Silicon Correlation Engineer - CPU Timing & Debug

Apple Inc. in Santa Clara, CA is seeking a Senior CPU Implementation Silicon Correlation Engineer to validate and correlate pre-silicon design targets with silicon performance. The role focuses on ensuring frequencies, voltages, and power targets are realizable on silicon and in final products shipped to customers. You will obtain silicon measurement data, analyze timing runs, and work with post-silicon teams to assess ROI of design features while diagnosing root causes from post-silicon speed #J-18808-Ljbffr