<Back to Search
Process Technologist - CMOS Imaging
Cupertino, CAApril 2nd, 2026
**Role Number:** 200641152-0836**Summary**Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices.We have an extraordinary opportunity for Foundry Interface Engineers. In this highly visible role, you will be at the center of process technology problem solving with a focus on interface with silicon vendors and foundries. This is a hands on, dynamic role requiring travel to suppliers and foundries world wide.**Description**Manage technical process interface with silicon vendors.Work closely with suppliers on supplier silicon process issues and requirementsCoordinate process transfers with IDMs and external foundry.Participate in technology development, device engineering, and ongoing sustaining engineering activities within Hardware Technology.Drive thorough investigation of root cause, and solutions to process/yield issues and its impact on high volume product production, performance and reliability.Manage and mitigate technology risks for multiple projects in parallel.Engage parties in decision making and drive to timely closure and thorough follow-through.Build essential internal and external relationships across all levels (Engineering to senior management) at suppliers and within AppleInterpersonal skills to engage at all levels of the supply chain from engineers to CEOs**Minimum Qualifications**+ BS and a minimum of 10 years of relevant industry experience**Preferred Qualifications**+ Candidate should have 10+ years of experience in semiconductor process R&D and manufacturing. Experience with process qualification and yield enhancement is desired.+ Deep knowledge of CMOS Imaging process technology, integration and device physics and industry competitive landscape is required.+ Experience with Deep Trench Etching systems, integration to imaging process flows and translation into extremely high volume manufaturing+ Experience interfacing with design these technologies is desired.+ Demonstrated prior experience and success solving highly complex technical problems under a very aggressive schedule is essential.+ People management skills and managerial experience is highly desired.+ Good data analysis, problem solving, and very strong communication skills required.+ Self-motivated and schedule oriented is expected.Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088\_EEOC\_KnowYourRights6.12ScreenRdr.pdf) .
806 matching similar jobs near Cupertino, CA
- Flex DFM Engineer
- Pre-Silicon Engineer
- Electrical Engineer - Test and Instrumentation
- Battery Management Systems - Electrical Engineer
- Senior Perception Algorithms Engineer - Special Project
- Manager - WW Business Process Re-Engineering
- Lead Trust & Safety Data Engineer
- Front-End CAD Methodology Engineer
- Engineering Project Manager, Build and Release
- Engineering Project Manager, Apple Watch, Product Design
- NAND Qu0026R Engineer
- Display Module Optical Engineer
- Lead Trust u0026 Safety Data Engineer
- Silicon Prototyping Engineer
- Custom Logic Design u0026 STA Engineer
- Engineering Project Manager (EPM) for GenAI, AI u0026 Data Platforms (AiDP)
- On-device ML Integration Engineer, Graphics, Games u0026 ML
- Mechanical Engineer
- Technical Product Support (TPS) Engineer III
- Technical Commodity Business Management V (B5) Semi, Cleaning , Coating Exp. Required
- New Product Manufacturing Engineer II
- Product Quality & Reliability Engineer E4
- Technical Product Support (TPS) Engineer (Etch/ PVD)
- Project Manager - Wafer Operations
- Engineering Technician II
- Technical Project/Program Management V
- New Product Manufacturing Engineer - III Senior
- Product Engineer III
- Global Product Support (GPS) Engineer III enior - (E3)
- Process Engineer (PVD) IV
- 2026 Summer Quantum Technology Processing Engineer Intern (Masters/PhD - Santa Clara, CA)
- 2026 Summer Quantum Technology Engineer Intern (PhD - Santa Clara, CA)
- High Speed Electric Engineer
- Released Product Engineering
- Modeling Engineer: Plasma Process and Machine Learning
- EPI Mechanical Engineer IV
- Technical Project Manager
- Technical Project Manager
- Supplier Engineer- Welding IV
- Technical Product Support