FPGA Development Tools Engineer – Synthesis

Job DetailsJob Description:Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications. Our FPGA compiler and development tools are central to enabling customers to efficiently design, optimize, and deploy complex hardware systems on advanced FPGA platforms.Position OverviewAltera is seeking a FPGA Development Tools Engineer to join our Synthesis team, focused on advancing the next generation of FPGA compilation technology. In this role, you will develop and enhance synthesis capabilities that transform RTL designs into optimized hardware implementations, directly impacting performance, power, and area (PPA).The ideal candidate brings strong expertise in RTL design and synthesis, combined with a solid software engineering background and a passion for building scalable, high-performance EDA tools.Key ResponsibilitiesSynthesis Development: Design, implement, and optimize synthesis algorithms to convert RTL (Verilog/SystemVerilog/VHDL) into efficient gate-level representations.Compiler Toolchain Contribution: Contribute to the FPGA compiler flow, integrating synthesis with placement, routing, and timing (STA) stages.Optimization & QoR: Improve quality of results (QoR) by optimizing performance, power, and area through synthesis-driven techniques.RTL Analysis: Develop tools and methodologies for analyzing and transforming complex RTL designs.Cross-Functional Collaboration: Work closely with architecture, STA, placement, routing, and validation teams to ensure alignment across the toolchain.Debug & Validation: Analyze synthesis results, debug issues (timing, logic structure, mapping), and drive resolution.Tooling & Automation: Develop internal tools, scripting, and automation to improve synthesis flows and productivity.The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.$149.1K - $215.9K USDWe use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.QualificationsRequired QualificationsExperience: 6+ years of experience in FPGA/ASIC design, EDA tools, or related fieldsRTL Expertise:Strong Hands-on Experience WithVerilog/SystemVerilog or VHDLRTL design and synthesis flowsTechnical Skills:Proficiency in C/C++ for tool developmentStrong understanding of algorithms and data structuresFamiliarity with debugging and performance analysisEDA / CAD Knowledge:Understanding OfLogic synthesis and optimization techniquesFPGA or ASIC design flows (synthesis → P&R → STA)Timing-driven design considerationsProblem Solving: Ability to analyze complex systems and develop scalable, high-performance solutions.Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. Candidates with a PhD are encouraged to apply; in accordance with US hiring practices, relevant experience gained during doctoral studies may be considered toward the required years of experience.Preferred QualificationsExperience with synthesis tools or FPGA toolchains (e.g., Quartus, Vivado)Knowledge of FPGA architectures (LUTs, DSPs, BRAM, interconnect)Familiarity with advanced optimizations (e.g., retiming, logic restructuring, resource sharing)Scripting experience (e.g., Python, Tcl)Background in compiler development or EDA algorithmsExperience working in large, distributed engineering teamsWhy Join AlteraBuild core synthesis technology for next-generation FPGA platformsInfluence compiler architecture and performance at scaleCollaborate with world-class engineers across silicon, architecture, and softwareJob TypeRegularShiftShift 1 (United States of America)Primary Location:San Jose, California, United StatesAdditional Locations:Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.