JOBSEARCHER

FPGA Engineer

Avtc GroupTucson, AZJune 3rd, 2026
FPGA EngineerDevelop FPGA designs including: Xilinx, Altera, and Microsemi. Designs are implemented using VHDL.Applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaborative modeling of algorithms, partition and perform code development, simulation, and place and route.Designs are verified against requirements using both directed test and constrained random methodologies.Design support is expected from requirements definition through integration and test. Design documentation and configuration management are required.Responsibilities to Anticipate:Design and deliver production quality FPGA releases from initial proof of concept up to productionArchitect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS)Translate system level requirements into FPGA requirementsDesign and code in VHDL for reliability and maintainabilityVerify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverageHelp drive projects and execute to program schedules on time and budgetCreate complete documentation including requirements, verification plan, and user's guidesBachelor of Science in Computer or Electrical Engineering.• 2-8+ years of experience to include the following:FPGA/ASIC design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM)Xilinx or Microsemi devices and flow toolsDelivering FPGA/ASIC solutions to system level applicationsHands on experience with integration and debug of FPGA/ASIC devicesFPGA design experience in one or more of the following areas:Radar processing techniquesImage processing techniques for visual and infrared sensorsEmbedded systems design using ARM, Microblaze, or Nios processorsGigabit serial interfaces and multi-gigabit transceivers (MGTs)Constrained random verification in UVM using System VerilogVerification utilizing emulation platforms, such as Veloce