Principal Signal Integrity Engineer (San Francisco)

Principal Signal & Power Integrity Engineer – San Jose, CAFull Time OpportunityFully Onsite in the Bay Area, CATotal Compensation: $450K+ Base, Bonus, RSU's (higher compensation levels depend on skillset/experience)This is a high-impact individual contributor role working on cutting-edge semiconductor packaging technology.What You'll DoLead signal integrity and power integrity design efforts across advanced packaging technologies, including substrates, interposers, and redistribution layers — from simulation through to design verificationOwn the SI/PI portion of product design, proactively identifying issues and driving solutionsParticipate in architecture and logic design, and execute full system-level simulationsContribute to multi-dimensional packaging designs for complex integrated circuitsEvaluate the full process flow, spanning high-level design, synthesis, place and route, timing, and powerConduct experimental testing, analyze results, and produce simulation and design verification reportsAssess vendor capabilities in support of development programsSet technical direction for future designs within your area of ownershipServe as a consulting resource to business and engineering leadershipRepresent the organization at relevant industry forums and conferencesDrive the development and application of innovative technologies and methodologiesWhat You'll BringBS or MS in Electrical or Computer Engineering (or equivalent); post-graduate degree preferred12+ years of hands-on signal integrity and power integrity engineering experienceProficiency with commercial SI/PI simulation tools such as HFSS, Ansys SIwave, Redhawk, and Cadence simulation toolsDeep expertise in high-speed signal integrity at 100 GHz and aboveStrong measurement skills including VNAs, de-embedding test fixtures, and high-speed probingProven ability to work independently as a recognized technical authority and industry-acknowledged expert