Substrate Layout Engineer - Chiplet Packaging

Eridu is looking for an experienced Substrate Layout Design Engineer to enhance AI infrastructure technology in San Francisco. This role focuses on the physical layout of high-density substrates for multi-die packages and requires collaboration with various engineering teams to ensure optimal design and manufacturability. The ideal candidate will have 8+ years of experience in advanced substrate layout, proficiency in Siemens Xpedition, and a strong understanding of packaging constraints. A competitive salary and opportunities to impact AI performance await. #J-18808-Ljbffr