DFT Principal engineer

Role: DFT Principal engineerLocation: Santa Clara, CAPosition Duration: Direct Hire (Full Time)Job DescriptionExperience in Scan Insertion, ATPG, MBISTRequired Skills: Scan insertion, ATPG Validation for SOC.Experience with Tessent and Modus for stuck-at and transition (at-speed) fault models, including coverage analysis and test point insertion.Experience on SGDFT, Coverage Analysis & Improvement on SCAN, ATPG, Scan insertion(Quick Synth flow using FC), Standalone Scan insertion flow using DC, MBIST insertionGood hands-on experience with ATPG GLS(ZD +SDF) simulation debugsWorking experience on SSN Pattern Retarget & FC/SOC GLS validationTool flows: Mentor Graphics Tessent Scan , Tessent TestKompress, and Synopsys tools FC Compiler, Tetramax, VCS,Verdi, Spyglass and Cadence Xcelium tool .Experience of working in Intel environment