Packaging Module Engineer

Role Overview As a Packaging Module Engineer, you will shape Intel's advanced packaging solutions that directly impact the delivery, performance, and sustainability of cutting-edge products. You will design and develop innovative packaging solutions that ensure secure transport and optimal performance of Intel products globally. Key Responsibilities Design, develop, and qualify packaging solutions and materials that meet product and regulatory requirements. Lead packaging development processes, including artwork creation, concepts, prototypes, qualification testing, and specification documentation. Collaborate with manufacturing, logistics, regulatory, and supply-chain partners to ensure packaging solutions meet operational needs. Identify and implement cost-saving, waste-reduction, and efficiency improvement measures for packaging processes. Conduct risk analysis to ensure packaging solutions comply with regulations and align with Intel's quality standards. Consult with cross-organizational teams on branding, marketing, SKUs, labeling, and bills of material requirements for shipments into Intel's distribution channel. Evaluate and qualify vendors to ensure high-quality packaging manufacturing startup and scalability. Benchmark packaging designs and processes against industry standards to maintain a competitive edge. Document and maintain technical specifications for packaging solutions to ensure consistency and clarity. Behavioral Traits Demonstrated problem-solving skills in packaging development or manufacturing. Effective communication skills to collaborate with cross-organizational teams, external vendors, and customers. Minimum Qualifications and Experience Master's degree in Engineering, Physics, Chemistry, or a related STEM field with 1+ years of educational or work experience, or a PhD in the same fields with 6+ months of educational or work experience. Experience in product packaging assembly processes and production methodologies. Statistical process control (SPC) principles and design of experiments (DOE) techniques. Analytical skills with proficiency in data analysis and risk assessment methods. Design for manufacturing (DFM) practices and packaging test criteria. Preferred Qualifications and Experience Experience with Surface Mount Technologies, solder joint formation/quality/reliability, and package certification methodologies. Experience leading technical teams, influencing stakeholders, and managing resources and timelines in a matrixed environment. Familiarity with semiconductor device fabrication processes and packaging process flows. A track record of delivering results in time-critical technical projects involving innovation and strategic planning. Apply problem-solving techniques and fundamental engineering concepts to create novel, efficient solutions. Passion for engineering excellence and sustainability. Job Details Job Type: College Graduate Shift: Shift 1 (United States of America) Primary Location: Phoenix, Arizona, USA Work Model: On-site presence Benefits Competitive pay, stock bonuses, and benefit programs including health, retirement, and vacation. Annual salary range: $133,800.00-$188,890.00 USD. EEO Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr