Lead Compiler Engineer

Lead Compiler EngineerUSA (Hybrid) | California PreferredFull Time Permanent ContractSalary: $280,000 to $360,000 (DOE)Total Comp: Equity, Bonus, Medical, Dental, Vision, 401(k), Commuter Benefits, Parental Leave, Child Care SupportA pioneering AI hardware company headquartered in California is redefining what is possible at the intelligent edge. Built around novel compute architecture principles and advanced model efficiency techniques, they have developed a tightly integrated hardware and software platform that delivers high performance AI inference at a fraction of the cost and energy of traditional approaches. Their technology powers a broad spectrum of intelligent devices, from wearables and household appliances through to robotics and autonomous vehicles.They are looking to bring on a Lead/Principal ML Compiler Engineer to serve as a technical authority on the ML compilation and optimisation pipeline. This is an ownership role: you will define the architectural direction of the compiler stack, set engineering standards across the team, and ensure that neural network models achieve real time performance on a custom AI accelerator at production scale.Key Responsibilities:Owning and defining the long term architecture of the ML compiler stack, including IR design, transformation pipelines, and hardware aware optimisation strategies.Setting the technical direction for complex compiler passes such as global memory allocation, liveness driven reuse, cross-operator fusion, and graph partitioning.Driving the development of cost models and optimisation heuristics that accurately reflect hardware execution behaviour at scale.Leading the adoption of advanced constraint based optimisation techniques including ILP, MILP, and constraint programming across the team.Serving as the primary escalation point for system level issues spanning model correctness, performance regressions, and hardware behaviour mismatches.Acting as the key technical liaison between compiler, hardware engineering, and silicon teams on co-design of compiler abstractions and execution models.Mentoring senior and mid-level engineers, raising the technical bar across the compiler organisation.Contributing to hiring, roadmap planning, and the long term quality of a production grade compiler infrastructure.Ideal Profile: Strong experience in compiler engineering, systems programming, or performance engineering.Proven track record of architecting and delivering production grade ML compiler systems or passes independently.Deep expertise with ML compiler frameworks (MLIR, TVM, XLA, or equivalent) and low level optimisation techniques including scheduling, memory management, and tiling.Strong intuition for performance trade-offs across compute, memory bandwidth, and data movement at a system level.Demonstrated ability to set technical direction and influence cross-functional engineering teams.Extensive experience with constraint solvers (MILP, ILP, CP).Background in AI accelerator architectures, embedded systems, or DSP is highly advantageous.This is an exceptional opportunity to join as a technical leader at a well-funded AI hardware company, shaping the compiler strategy that directly determines the performance and efficiency of next-generation intelligent devices at the edge.APPLY NOW to discuss further details.5V Tech are acting as an Employment Agency for the purposes of this position. We offer a reward scheme if you can recommend someone for this role: $250 for you and $250 to a charity of your choice. 5V Tech are recognised talent solutions experts within IoT and Deep Tech, working across Europe, the UK, and North America.