Hardware Debug Engineer

Role: Hardware Debug EngineerLocation - Mountain View, CA - onsiteConfiguring the Debug and Production nodes according to their standards physically and logically on the platformContinuous validation and updating the nodes for its firmware BIOS BMC NIC PSU FPGA ARM SoC to the recipe level as in the EV state we get frequent changes and fixes with new FW and imagesPython scripting to develop test automation utility toolsRack and stack of servers and kit to cabinetsPhysical installation and or removal of equipment within theData Center or Intermediary Data FacilitiesHardware debugging and troubleshooting using JTAG or similar debug toolsResults analysis of the tests ran on the production and debug configurationsReport the Bugs identified related to the hardwareTroubleshooting hardware errors from Lab and fixing the issuesUpgrading the ARM SoC images on the Debug nodes from Lab and Production nodes remotely through RM as and when new SoC image releasesIdentified major Bugs in EV1 and EV2 validation testingDevelopment and testing automation script using python PowerShell and shell scriptingData postprocessing analysis and report outDocumenting steps and snapshots of benchmarksValidation of system rack and rack infrastructure hardwareExecution of test cases to validate Functionalities and stability of the Parthenon HardwareReport the Bugs identified related to the hardwareRegression of automated test cases from CSI Tool Kit Team CTKReport the Bugs identified related to the new version of CTKTroubleshooting hardware errors from Lab and fixing the issuesContinuous validation and updating the nodes for its firmware BIOS BMC NIC PCIe Switch Athena DriverHSP 1PSOC to the Best Known Configuration BKC recipe level as in the EV state we get frequent changes and fixes with new FW and images