Lead ASIC DFT Architect - Testability & Post-Silicon Expert

itD is seeking a DFT Lead to drive implementation of advanced DFT solutions across the silicon development lifecycle, ensuring highly testable, manufacturable ASIC designs. The candidate will lead cross-functional teams to deliver production-ready silicon. Requirements include 8–10+ years in ASIC DFT, hands-on experience with JTAG, MBIST, BISR, boundary scan, ATPG, and industry tools like Tessent, Xcelium, Genus, Tempus or PrimeTime. #J-18808-Ljbffr