<Back to Search
Lead IP/SOC Verification Engineer
Folsom, CAMarch 20th, 2026
A leading semiconductor company in California is seeking a Lead IP/SOC Verification expert to oversee design verification for next-generation graphics programs. You'll lead efforts in collaboration with engineering teams, driving quality and execution excellence. Candidates should have a solid background in IP and SOC verification, with experience in ASICs, UVM, SystemVerilog, and C/C++. This role offers the opportunity to grow into a leadership position, contributing to innovative projects that shape the future of computing.
J-18808-Ljbffr
Showing 150 of 74,299 matching similar jobs
- Senior Offensive Security Consultant - Pen Testing
- Verification and Validation Engineer
- Senior Solutions Engineering Leader
- HW/SW Systems Engineer
- PHY Design Verification Engineer
- Formal Verification Engineer
- Lead Design Verification Engineer
- Sr. ASIC Design Engineer
- GPU Design Verification Engineer
- Design Verification Engineer
- Display Architecture Validation Engineer
- SoC Power Validation Engineer
- Lead Design Verification Engineer
- Lead Design Verification Engineer
- Silicon Validation Software Engineer: CPU and Memory Hierarchy
- Emulation Verification Engineer
- Lead Design Verification Engineer
- Lead Design Verification Engineer
- Senior DFT Engineer: SoC Test & Silicon Reliability
- Workday Solution Architect-Contract
- Analog Design Manager, Power & Clock IP for SoC Platforms
- Vulnerability & Exposure Engineer - Automate Security in CI/CD
- System Level Test Engineer
- Global Director of Systems Quality & Validation
- Senior SoC Architect
- Front End Design Engineer Intern (Summer 2026)
- Senior GPU Memory System Architect
- VLSI Design Engineer - Server/Data Center & AI IPs
- Lead Design Verification Engineer
- Senior Package Design Engineer
- Mixed Signal Verification Engineer
- CPU CDC/STA EngineerSanta Clara, CAMarch 25th, 2026
- Lead Verification Engineer
- System IP / RTL Design Engineer
- SoC Design/Integration u0026 Synthesis Engineer
- SOC IP Methodology Engineer - Custom SOC
- Firmware Validation EngineerSan Mateo, CAMarch 25th, 2026
- Principal Verification Lead Engineer
- Staff GPU Design Verification Engineer Subsystems
- HSIO Validation Engineer, Annapurna Labs Machine Learning Acceleration