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RTL coding/simulation/debug capabilities using VHDL and/or Verilog. RTL simulation, Synthesis, and Static Timing Analysis in one or more of the following: Xilinx Vivado, Altera/Intel Quartus, Lattice Diamond, and Microsemi Libero.
ExpandApply NowActive JobUpdated 9 days ago - UpvoteDownvoteShare Job
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RTL coding and simulation in VHDL, Verilog, or SystemVerilog. Experience writing RTL and/or testbenches using VHDL, Verilog, or SystemVerilog. RTL coding and simulation in VHDL, Verilog, or SystemVerilog.
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SRI's Center for Advanced Imaging Electrical Engineering Team based in Princeton, NJ, is seeking innovative and highly motivated Principal Digital IC Design Engineer - Verilog RTL to join us in the development of state-of-the-art IC and FPGA designs for numerous commercial, spacecraft, and government applications.
$162,648 - $180,000 a yearFull-timeExpandApply NowActive JobUpdated 4 days ago - UpvoteDownvoteShare Job
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Port ASIC and IP RTL code to prototyping and emulation platforms (Zebu/HAPSs, Palladium/Protium) A minimum of 5 years of experience with porting ASIC/IP RTL to Emulation platforms: Zebu/HAPSs, Palladium/Protium.
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With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.
$125 - $150ExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Mixed signal RTL experience is a plus Exposure to leadership or mentorship is an asset ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering LOCATION: Boxborough, MA #LI-HYBRID #LI-AP3 At AMD, your base pay is one part of your total rewards package.
Full-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Experience with tools/skill sets including Software Defined Radios (RTL-SDR, HackRF or similar), RFID, and Near-field Communication (NFC), with a focus on integrating them into UAS platforms. Experience with tools/skill sets including Software Defined Radios (RTL-SDR, HackRF or similar), RFID, and Near-field Communication (NFC), with a focus on integrating them into UAS platforms.
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Strong RTL coding/simulation/debug capabilities using VHDL and/or Verilog (VHDL preferred) Experience with RTL simulation, Synthesis, and Static Timing Analysis in one or more of the following toolsets: Xilinx Vivado, Altera/Intel Quartus, Lattice Diamond, and Microsemi Libero.
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Laboratory test and measurement equipment such as oscilloscopes, power supplies, pulse generators, logic analyzers, protocol analyzers Industry standard communication protocols such as SPI, I2C, AXI, Avalon, Ethernet, AMBA, Wishbone Fixed-point digital signal processing in RTL designs.
$125,000 - $175,000 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Specifically, we need engineers and scientists who have the fundamentals and interest to design complex embedded systems, including architecture development, detailed design, schematic capture, PCB layout, as well as FPGA RTL development and simulation.
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Provide technical guidance and subcontractor oversight throughout SoC design process to include, supervising design activities (RTL, DFT, physical design, verification), integration (packaging), and test (test application/demo.
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Collaborate with NVIDIA memory controller designers and DRAM vendors to bringup/debug challenging issues related to the next generation of LPDDR and DDR memoriesEnsure code and functional coverage of all the RTL which you will verify.
$128,000 - $258,750 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation. The NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification.
$124,000 - $345,000 a yearFull-timeExpandApply NowActive JobUpdated 23 days ago - UpvoteDownvoteShare Job
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Experience with Video and Image processing FPGA or ASIC developments. ASIC/FPGA verification using inspection, analysis, simulation, and test methods. Become part of the growing Avionics FPGA/ASIC team.
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Shall perform Resistance Training Laboratories (RTL) and participate in debriefing of RTL IAW SERE Level-C POI and Special Forces SERE School SOP. Summary:Yorktown Systems Group is seeking a Resistance Training Laboratory Team Leader to provide Survival, Evasion, Resistance and Escape (SERE) Level C Instruction and instructional support services to the U.S. Army John F. Kennedy, Special Warfare Center & School (USAJFKSWCS.
Full-timeExpandApply NowActive JobUpdated 3 days ago
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