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We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. Seamless porting between simulation/emulation/prototyping platforms.
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In-depth knowledge of digital logic design, chip architecture and microarchitecture. Testbench development - System Verilog UVM and C tests. Regression setup and debug for RTL/Gate Level Netlist/UPF PA sim/Emulation/Proto.
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Test Equipment, Modeling and Simulation, Firmware and Configurable Logic, System or Software Engineering, or Supplier Quality. Test Equipment, Modeling and Simulation, Firmware and Configurable Logic, System or Software Engineering, or Supplier Quality.
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Adept in using EDA tools for Schematics/Layout and Signal Integrity (Cadence, Mentor, OrCAD, Sigrity, ADS) Experienced with simulation tools like PSPICE/HSPICE/MATLAB and processor load emulators.
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Strong Knowledge of CCA design specifying mixed-signal technology circuits consisting of processors, I/O communications, and programmable logic devices (FPGA, CPLD) Strong RTL coding/simulation/debug capabilities using VHDL and/or Verilog (VHDL preferred.
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Software architecture, design, development, integration, and verification Configurable Logic / Firmware / VHDL architecture, design, development, integration, and verification Systems engineering, architecture, and/or design System performance and analysis Algorithms and signal processing Modeling and simulation (for example 6-DOF.
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This position requires the development and management of Implantable Medical Device (IMD) test environments used by Firmware Verification Test (FWVT) engineers for firmware verification through simulation, emulation, timing analysis, test analysis, and logic analysis.
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Utilizing schematic capture, circuit simulation, and PCB design software. Developing and coding embedded firmware, using relevant firmware design tools. Designing analog and digital logic and control circuits, as well as microcontrollers.
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The Memory IP Group (MIP) within the Client Engineering Group (CEG) are looking for logic design engineer to work on state-of the art DDR PHY. This team works on the design of crucial DDR PHY IPs which go into next generation Intel client products.
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An experienced SoC Design Verification Engineer able to provide design verification services for multi CPU/DSP SoC. Integration/development of UVM mailboxes and HW/SW communication components. Experience in developing TestPlan/testbenches, SystemVerilog/UVM/C-based TestBench, and writing/debugging tests.
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Accenture engineers are true "Silicon to SW" Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market. If you would like to be considered for employment opportunities with Accenture and have accommodation needs for a disability or religious observance, please call us toll free at 1 (877) 889-9009, send us an email ( or speak with your recruiter.
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Inclusion and diversity are fundamental to our culture and core values. Engage with the team to drive continuous improvement to the verification environment to find more bugs and improve coverage. Our rich diversity makes us more innovative and more creative, which helps us better serve our clients and our communities.
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We have an unwavering commitment to diversity with the aim that every one of our people has a full sense of belonging within our organization. Experience with ARM Cortex and/or RISC-V processor verification.
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We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. Team player with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design.
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Applicants for employment in the US must have work authorization that does not now or in the future require sponsorship of a visa for employment authorization in the United States. Accenture is committed to providing equal employment opportunities for persons with disabilities or religious observances, including reasonable accommodation when needed.
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