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You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing analysis, floor planning, ECO, bringup & lab debug, and ATE test development. We are now looking for a Senior ASIC Design Engineer for Memory Controllers.
$124,000 - $247,250 a yearFull-timeExpandApply NowActive JobUpdated 3 months ago - UpvoteDownvoteShare Job
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Deliver physical design of an end-to-end IP or integration of ASIC/SoC design. We have 100+ years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware.
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Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design, VLSI and platform teams. Review downstream specifications and verification plans in ASIC, software and/or platform to ensure requirements are followed.
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Principal Engineer/Manager, ASIC Physical Design. Contribute to all aspects of ASIC integration effort including floor planning, clock and power distribution, global signal planning, I/O planning, and hard IP integration.
ExpandApply NowActive JobUpdated 4 days ago - UpvoteDownvoteShare Job
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FPGA/ASIC design and/or development process experience. The individual will perform functional verification of register transfer level (RTL) code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilog.
$173,200 - $259,800 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 5 years of relevant experience; or Master's degree plus a
$122,652 - $136,000 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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10 or more years of educational and/or work experience working with digital ASIC/FPGA design and verification. 10 or more years of professional experience with Hardware-based integration and test of ASIC/FPGA designs.
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Technical lead or SoC/chip lead experience working with collaborative cross-disciplinary teams (ASIC design, verification, physical design, emulation, software, electronic board design and platform.
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Experience with ASIC design process and methodologies; and related tools: version control, bug database; etc. Author and implement the security architectural specification collaborating with a diverse team across many disciplines including: design, verification, emulation, software, packaging, circuit board and more.
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Advanced knowledge of ASIC architecture, design, and verification flow. Knowledge of Formal verification, low power verification and analog mixed signal simulation are a plus. Expert knowledge of state-of-the-art verification flow and methodology, such as constrained random, functional/code coverage, assertions, GLS.
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You will be a substrate design engineer working on the latest technologies and developing ASIC substrates that push the boundaries on power, integration, and fabrication / assembly technology. We are a specialized ASIC team with experts in all aspects of Silicon Design and system integration.
ExpandApply NowActive JobUpdated 9 days ago - UpvoteDownvoteShare Job
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Understands Analog ASIC design techniques and process physics to make design decisions and tradeoffs to create a low-power die-size optimized design. Delivery of expert level technical support in the resolution of Analog ASIC design and application issues.
$150,400 - $225,600 a yearFull-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Keywords:Linthicum Heights MD Jobs, FPGA Engineer, FPGA, DSP, Xilinx, PSK, QAM, OFDMA, PCIe, Ethernet, AMBA, DDR, UVM, Questa, Spyglass, Synopsys, Synplify, Vivado, ASIC, Electrical Engineer, Maryland Recruiters, Information Technology Jobs, IT Jobs, Maryland Recruiting.
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Familiarity with ASIC tools, libraries, design flow and fabrication is a plus. Expertise in VHDL/Verilog, System Verilog and OVM/UVM, and Modelsim/Questa simulator is a plus. On-Site Work Environment: This position requires regular in-person engagement by working on-site three or more days each normally scheduled week in the primary work location.
$137,500 - $173,500 a yearFull-timeExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Experience in an SoC product development organization or in an ASIC vendor company along with customer facing experience preferable Hands-on experience with DFT circuit insertion and validation for scan, at-speed, MBIST and Boundary scan Experience with Industry standard DFT/ATPG EDA tools like Tessent/TestMax/Modus.
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