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Wireless SoC Design Verification Engineer
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- Wireless SoC Design Verification Engineer
- As part of our team, you will have the opportunity to take the lead on and contribute to verifying a set of complex SOCs. This team will allow you to integrate multiple sophisticated IP level DV environments, craft highly reusable best-in-class UVM TB, implement effective coverage driven and directed test cases, deploy new tools and implement methodologies to improve quality of tape-out readiness.
- As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing state of the art Wireless SoCs!
- Advanced knowledge of HVL methodology (UVM/OVM) with most recent experience in UVM
- Hands-on verification experience of PCIe, Bus Fabric, NOC, AHB, AXI, based bus architecture in UVM environment.
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