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Tech Dir Signal Integrity
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$141,500 - $262,700 a year
Full-time
- Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Principal Engineer with signal integrity and package design experience to join our Memory Interface Chips BU’s engineering team in San Jose, California.
- As an SPE Signal Integrity, the candidate will be reporting to the VP of Engineering and is a Full Time position.
- In this highly visible role, the candidate will work within our SI/PI team to work on modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) in the very challenging DDR field with speed up to 12800+ MT/s.
- Create SI/PI methodologies and work with the Design and SI teams to do SI/PI study and package design for the latest DDR product portfolio
- Solid background in SI/PI and package design to provide technical leadership to the team
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