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Sr. ASIC Design Verification Engineer - UVM, PCIe, CXL
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$150,000 - $225,000 a year
Full-time
- Job Title: Sr. ASIC Design Verification Engineer - UVM, PCIe, CXL
- Requirements: ASIC Design, Verification, UVM, PCIe, CXL
- We were founded in 2020 by a team of veterans in Silicon Valley, and our mission is to accelerate AI computing in data centers and HPC by introducing high-performance, power efficient, scalable and cost-effective interconnect solutions.
- AI computing and data center architectures are undergoing a fundamental transformation of disaggregation and composability, driven by the enablement of CXL (Computing Express Link) technology.
- We're expanding our team and looking to add a Sr. ASIC Design Verification Engineer.
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