Silicon Labs

Senior Digital Design Engineer - SOCAustin, TXMeet the TeamThe IoT Digital Design team is a state-of-the-art IC design team focused on producing world class Wireless MCU SoCs. The architecture specification, design, verification, emulation, and implementation of the Wireless MCU SoCs are all the responsibilities of the IoT Digital team.. ResponsibilitiesAs a Senior Digital Design Engineer you will develop world class, highly integrated, low power, System on a Chip devices to serve the IoT wireless market.. RTL design of modules through System Verilog HDL coding, adhering to quality standards.. Prepare and hold architecture, design, and verification reviews with technical staff throughout project lifecycleSoC level configuration and integration of digital and mixed-signal IPs. Examples include embedded processors, memory and controllers, busses, power and clocking systems, security systems, machine learning, radio systems, analog IP, and pads.. Experience in working with analog and mixed signal designs, to support design integration and verification of these subsystems in SOC.Experience with scripting and automation.

senior design engineer

We are Silicon Labs. We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives. Senior Digital Design Engineer - SOCAustin, TXMeet the TeamThe IoT Digital Design team is a state-of-the-art IC design team focused on producing world class Wireless MCU SoCs. The architecture specification, design, verification, emulation, and implementation of the Wireless MCU SoCs are all the responsibilities of the IoT Digital team. These SoCs include an embedded CPU system with analog and digital peripherals, advanced security, advanced power management, and best in class radios to support a wide range of wireless IoT applications and standards. We strive to provide advanced technology solutions through innovation in custom RISC-V Cores and AI/ML components.ResponsibilitiesAs a Senior Digital Design Engineer you will develop world class, highly integrated, low power, System on a Chip devices to serve the IoT wireless market. Responsibilities include the following:Develop complex SoC/chip Architectures with multiple processors, digital and mixed signal subsystems, multiple power, and clock domains with a goal towards optimizing power for specific customer scenarios.RTL design of modules through System Verilog HDL coding, adhering to quality standards.Prepare and hold architecture, design, and verification reviews with technical staff throughout project lifecycleSoC level configuration and integration of digital and mixed-signal IPs. Examples include embedded processors, memory and controllers, busses, power and clocking systems, security systems, machine learning, radio systems, analog IP, and pads.Perform logic synthesis, full chip timing and power analysis to optimize designs for key customer scenarios.Pre-silicon verification utilizing a combination of block/chip-level test benches.Validation/bring-up of designs on silicon, providing support to cross-functional teams Skills You Will Need Master’s degree in Electrical Engineering8-10 years of professional experience in digital CMOS IC design Minimum QualificationsVerilog RTL design with demonstrated experience of taking designs through the silicon development lifecycle to productionKnowledge of embedded processor systems and C codingExperience with logic simulators for both RTL and gate-level simulation, design/waveform browsers, and power analysis toolsExperience with logic synthesis and timing constraintsExperience in working with backend team to optimize design for power performance and area.Experience in working with analog and mixed signal designs, to support design integration and verification of these subsystems in SOC.Experience with scripting and automation. Knowledge of Python, Perl, and TclExperience with revision control and configuration management systems (such as Perforce, Git, Methodics)Excellent written and verbal communications skillsDemonstrated ability to generate high output in a self-driven mannerBenefits & Perks Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plansHighly competitive salary401k plan with match and Roth plan optionEquity rewards (RSUs)Employee Stock Purchase Plan (ESPP)Life/AD&D and disability coverageFlexible spending accountsAdoption assistanceBack-Up childcareAdditional benefit options (Commuter benefits, Legal benefits, Pet insurance)Flexible PTO schedule3 paid volunteer days per yearCharitable contribution matchTuition reimbursementFree downtown parkingOnsite gymMonthly wellness offeringsFree snacksMonthly company updates with our CEO#LI-KB1#LI-HybridThe annualized base pay range for this role is expected to be between $114,428 - $212,510 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.

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