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Principal Engineer, Project Coordinator
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- Central Engineering AMS-IP team provides leading-edge SerDes PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.
- ASIC design engineer responsible for planning and coordinating the design, verification, and evaluation of analog mixed-signal circuits in high-speed data communication ICs. The candidate will work closely with digital design, design verification, firmware, and analog design engineers to ensure that projects are completed on time and in high quality.
- Collaborate with Analog/DSP/DV/FW/AE teams to coordinate the delivery of competitive SerDes IP solutions for all the Marvell product lines.
- Lead the development and execution of analog mixed-signal development
- Track and report on analog mixed-signal IP development progress
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