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Lead Principal Verification Engineer
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- Lead Principal Verification Engineer
- Renesas is looking for a Mixed-Signal Verification Engineer to join our team of engineers that support the development and release of several power management ICs for the portable market.
- Familiar with EDA design tools and Cadence design environment
- Experience in UVM based verification flow is a plus
- We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets.
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