Upvote
Downvote
CPU Cache RTL Architect
Share Job
- Suggest Revision
- CPU Cache RTL Architect
- Apple's Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced technical leader to drive CPU multi-level cache subsystem architecture and RTL development for multi-processor systems.
- High performance (low latency, high bandwidth) design techniques
- Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools.
- Experience using an interpretive language such as Perl or Python
Active Job
Updated 13 days agoSimilar Job
Relevance
Active