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ASIC Verification Engineer
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Full-time
- Work with a dedicated team of engineers, using the latest verification practices, to verify the digital design intent of our SOC's at the block and system level.
- Engage early in the verification process to understand the verification requirements and participate in UVM or SystemVerilog testbench development.
- Expertise in developing testbenches using System Verilog and UVM
- Experience in the use of scripts to support automation (Python, Make, Csh, Bash, Tcl, etc)
- Familiarity with C-code/embedded firmware/debuggers
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