Upvote
Downvote
ASIC Digital Design Engineer
Share Job
- Suggest Revision
- In this role, you will design and develop RTL for high-speed SERDES including blocks such as calibration logic, equalization, adaptation, auto-negotiation, BER eye monitor, clock domain crossing, etc.
- Convert Architecture specification to Micro-architecture specification, implement logic functions in RTL using Verilog/System Verilog
- Work with Pre/Post-silicon verification teams to test, debug and root-cause RTL simulation/Silicon/FPGA failures
- Pair with Architect, Modeling, Analog, Verification, P&R, and Firmware designers to ensure a smooth interface between Digital and Analog circuits, project execution, and SoC integration
- SERDES (Serializer/Deserializer) Design and RTL development experience
Active Job
Updated 12 days agoSimilar Job
Relevance
Active