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Analog IP Design Manager: MH
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- This is a high visibility role responsible for managing the centralized IO - Analog IP library team.
- The team is responsible for the design, simulation, characterization, and validation of I/O circuits, band-gap-based power on reset circuits, standard cells, de-glitch cells, delay macros, and level shifters, both dynamic and static.
- This included transistor-level design of the analog IP, characterization for timing, working with layout teams to get the IP on silicon, working with design teams to define the specs for the IP, developing Verilog models for the IP, and providing guidance for integration of the IP into the chip level floorplan.
- Responsibilities include:Manage, mentor & grow the design teamLead team in the design, simulation, and optimization of analog IP circuitsDeliver characterization and modeling of analog IP and I/O libraries to support mixed-signal design flowPut flows and methodology in place to develop, release and maintain analog IP and I/O libraries and modelsRequired Skills and QualificationsThis position requires 10+ years of proven experience leading engineering teams.
- Good understanding of transistor-level circuit simulation and design.
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