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Architect Labs
Architect Labs
Related Locations:
Palo Alto, CA
Eastern, KY
Top Occupations:
Computer Hardware Engineers
Computer Systems Engineers/Architects
Validation Engineers
Top Industries:
Computer Systems Design Services
Semiconductor and Related Device Manufacturing
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Architect Labs
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Member of Technical Staff - Architect
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
June 5th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
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Staff AI Accelerator Compiler Engineer
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Architect Labs
Palo Alto, CA
L6 Lead
June 19th, 2026
Software Developers
Software Publishers
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Lead Physical Design Engineer for AI Silicon Tapeout
APPLY
Architect Labs
Palo Alto, CA
L6 Lead
October 17th, 2026
Computer Hardware Engineers
Semiconductor and Related Device Manufacturing
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Member of Technical Staff - Formal Methods
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
June 3rd, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
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AI Research Intern: Hardware Design & ML
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Architect Labs
Palo Alto, CA
L1 Intern
July 4th, 2026
Computer and Information Research Scientists
Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)
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Microarchitect / RTL Design - Memory Subsystem Architecture & Design
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
August 19th, 2026
Computer Hardware Engineers
Computer Systems Design Services
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Microarchitect / RTL Design - Memory Subsystem
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Architect Labs
Palo Alto, CA
L6 Lead
August 22nd, 2026
Computer Hardware Engineers
Computer Systems Design Services
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Lead Design Verification Architect for AI-Driven SoCs
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
June 30th, 2026
Computer Hardware Engineers
Semiconductor and Related Device Manufacturing
Show all >
Senior Design Verification Engineer
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Architect Labs
Palo Alto, CA
L7 Manager
June 16th, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
Founding RTL Design Architect for AI Accelerators
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
August 11th, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
Staff Software Engineer AI-Driven Chip Design Platform
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
July 8th, 2026
Software Developers
Computer Systems Design Services
Show all >
Staff Compiler Engineer for AI Accelerators & ISA Co-Design
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
June 30th, 2026
Software Developers
Computer Systems Design Services
Show all >
Member of Technical Staff - Formal Methods
NEXT STEPS
Architect Labs
Denver, CO
L6 Lead
August 14th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
Show all >
RTL Design Lead: On-Chip Interconnect & NoC Fabric
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
August 29th, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
Microarchitect / RTL Design - Network Datapath & MAC Engine
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Architect Labs
Palo Alto, CA
L6 Lead
August 22nd, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
Show all >
Member of Technical Staff - ML Research
APPLY
Architect Labs
Palo Alto, CA
L6 Lead
June 3rd, 2026
Computer and Information Research Scientists
Computer Systems Design Services
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Senior Formal Verification Engineer, AI Silicon
APPLY
Architect Labs
Palo Alto, CA
L6 Lead
October 3rd, 2026
Validation Engineers
Computer Systems Design Services
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Ethernet MAC & Network Datapath RTL Architect
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Architect Labs
Palo Alto, CA
L6 Lead
September 23rd, 2026
Computer Network Architects
Computer Systems Design Services
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Member of Technical Staff - Physical Design
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Architect Labs
Palo Alto, CA
L6 Lead
September 16th, 2026
Computer Hardware Engineers
Semiconductor and Related Device Manufacturing
Show all >
Member of Technical Staff - Compilers
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
June 5th, 2026
Software Developers
Computer Systems Design Services
Show all >
Senior RTL Designer – Memory Subsystem & Ethernet
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Architect Labs
Palo Alto, CA
L6 Lead
October 15th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
Show all >
Senior Microarchitectural DV Engineer - AI SoC Verification
APPLY
Architect Labs
Palo Alto, CA
L6 Lead
October 17th, 2026
Computer Hardware Engineers
Computer Systems Design Services
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Member of Technical Staff - Formal Verification
APPLY
Architect Labs
Palo Alto, CA
L6 Lead
August 27th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
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Chief Architect
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Architect Labs
Palo Alto, CA
L8 Director
October 30th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
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Vice President of ASIC Engineering
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Architect Labs
Palo Alto, CA
L7 Manager
October 31st, 2026
Computer Hardware Engineers
Semiconductor and Related Device Manufacturing
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Staff RTL Design Architect for AI Accelerator SoCs
APPLY
Architect Labs
Palo Alto, CA
L6 Lead
October 10th, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
Founding RTL Design Lead for AI Accelerators
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
June 20th, 2026
Computer Hardware Engineers
Semiconductor and Related Device Manufacturing
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General Application
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
August 27th, 2026
Computer Hardware Engineers
Custom Computer Programming Services
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Founding Member of Technical Staff - ML Infra
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
June 26th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
Show all >
Head of Growth & Strategic Partnerships - AI ASICs
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Architect Labs
Palo Alto, CA
L7 Manager
July 8th, 2026
Chief Executives
Semiconductor and Related Device Manufacturing
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Head of Business Development
NEXT STEPS
Architect Labs
Palo Alto, CA
L7 Manager
July 8th, 2026
Computer Hardware Engineers
Computer Systems Design Services
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Hardware Design Engineer
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
May 24th, 2026
Computer Hardware Engineers
Computer Systems Design Services
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Founding Member of Technical Staff - Post Training
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
July 14th, 2026
Computer and Information Research Scientists
Computer Systems Design Services
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Senior Memory Subsystem RTL Architect for AI Chips
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
August 19th, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
Microarchitect / RTL Design - Memory Subsystem Architecture & Design
NEXT STEPS
Architect Labs
Brooklyn, NY
L6 Lead
August 19th, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
Microarchitect / RTL Design - On-Chip Interconnect & High-Speed Fabric Design
NEXT STEPS
Architect Labs
Brooklyn, NY
L6 Lead
August 19th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
Show all >
Microarchitect / RTL Design - On-Chip Interconnect & High-Speed Fabric Design
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
August 19th, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
Show all >
Lead RTL Designer AI-Driven NoC & Fabric
NEXT STEPS
Architect Labs
Palo Alto, CA
L6 Lead
August 30th, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
Microarchitect / RTL Design - Interconnect & Fabric
APPLY
Architect Labs
Palo Alto, CA
L6 Lead
August 22nd, 2026
Computer Systems Engineers/Architects
Computer Systems Design Services
Show all >
Senior Memory Subsystem RTL Architect for AI Chips
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Architect Labs
Eastern, KY
L6 Lead
October 22nd, 2026
Computer Hardware Engineers
Computer Systems Design Services
Show all >
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