Upvote
Downvote
STA Engineer
Share Job
- Suggest Revision
- Key QualificationsHave good concepts of ASIC design timing closure flow and various methodologies.
- Proven experience in ASIC timing constraints generation and timing closure.
- Have concepts of timing corners/modes, process variations and signal integrity related issues.
- Have background in Constraint analysis and debug, using industry standard tools such as Synopsys GCA (Galaxy Constraint Analyzer).
- Full chip and block level timing closure ownership throughout the entire project cycle (RTL, synthesis and physical implementation.
Expired 8 days agoInactive Job
Similar Job
Relevance
Active