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Principal CAD Engineer - Parasitic Extraction
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- Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
- The Senior/Principal CAD Engineer - Parasitic Extraction is a technical role within the Engineering Automation (EA) organization at Micron!
- The tools and flows enable all aspects of mixed-signal, transistor-level custom IC design including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification (LVS, DRC), ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis (including HCI, BTI, EM/IR), tape out and mask generation.
- 8 + years of direct CAD or Design experience in mixed-signal, custom IC design flows
- SPF Extraction experience, supporting tools such as Synopsys Star-RCXT, Siemens/Mentor Grapics PEX or Cadence Quantus.
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