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Physical Design Engineer
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- Integrate analog blocks into the digital design flow.
- Implement low power design techniques to optimize power consumption.
- Perform signoff checks including Logic Equivalence Checking (LEC) with Conformal, RTL Versus (RV) analysis with Ansys tools, Layout Versus (LV) with DRC clean-up utilizing Caliber, and Voltage Constraint Logic Planning (VCLP) with static checks.
- 5-10 years of experience in physical design, with a strong understanding of RTL to GDS flow.
- Proficiency in Fusion Compiler, Cadence Innovus, and other relevant EDA tools.
Expired 7 days agoInactive Job
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