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Work Model for this Role: This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. The goal is to characterize and isolate failure from the tester/system signature down to a single failing node or transistor, employing a wide array of DFx (including Scan/ATPG) and test tools, complemented with your knowledge of computer architecture, logic, circuit/VLSI, process, and device physics.
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As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. This position is not eligible for Intel immigration sponsorship.
$243,284 a yearFull-timeExpandApply NowActive JobUpdated 13 days ago - UpvoteDownvoteShare Job
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Position : Coating Engineer. Process Oversight : Oversee the design, development, and implementation of thin film deposition processes (e.g., PVD, CVD, ALD, sputtering, and other coating technologies) tailored for semiconductor equipment components.
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Job Description: The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer issues. Job Description: The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer issues.
$144,599 a yearFull-timeExpandApply NowActive JobUpdated 9 days ago - UpvoteDownvoteShare Job
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Staff Test Engineer plays an important role in designing, implementing, testing and deploying rack system solutions for data center and enterprise customers. Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide.
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Additional Qualifications Desired 4+ years of professional experience in hardware modeling roles with 2+ years experience as lead engineer on multi-physics FEA. Experience developing and delivering hardware products as lead thermal design engineer.
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Highest-level relevant state/local license for Stationary Engineer and/or HVAC, plus universal level refrigerant recovery license. ABM, a leading provider of integrated facility solutions, is looking for a Chief Engineer.
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As a Principal Engineer - Design (ASIC) in the Microchip Data Center Solutions group, you will get hands-on experience developing our next generation of SSD Flash controller SOC products. As a Principal Engineer - Design (ASIC) in the Microchip Data Center Solutions group, you will get hands-on experience developing our next generation of SSD Flash controller SOC products.
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As a senior ASIC Physical Design Engineer, you will work closely with other digital designers and mixed signal designers to develop the next generation of mining ASIC. In particular, the challenges of block level physical implementation, timing, integration, and physical verification are critical parts of this role.
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WeRide is a leading, commercial-stage global company that develops autonomous driving technologies from Level 2 to Level 4.
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The systems and hardware validation engineer is responsible for validating Ayar Labs multi-wavelength sources and CMOS chiplet performance. Executives from Intel and GLOBALFOUNDRIES share their thoughts on Ayar Labs and the promise of in-package optical I/O (video.
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The Lead Materials & Process Engineer will apply their technical knowledge and expertise to support components across our vehicle. Familiarity with 3D CAD software (CATIA, SolidWorks, NX, or similar.
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Sr. Principal Analog Design Engineer. We are a passionate and dedicated team of world-class analog, mixed-signal, and digital design and verification engineers committed to building the next generation of SOCs. This position is for an experienced and equally passionate analog and mixed-signal engineer/manager interested in excellent personal and professional growth opportunities.
$271,500 a yearFull-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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The Sr. Digital Design Engineer candidate must have demonstrated success in digital design & verification/infrastructure development for digital FPGAs/ASICs∯*∯ Other key skills include technical/project leadership, documentation, RTL design knowledge, backend flow and tools knowledge.
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Title: engineer Company: Intel in San Jose, WA, Ohio
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