{"schemaVersion":"jobsearcher.job.v1","id":"fef861da3e8f5cdac2b4bcaa","url":"https://jobsearcher.com/jobs/fef861da3e8f5cdac2b4bcaa","canonicalUrl":"https://jobsearcher.com/jobs/fef861da3e8f5cdac2b4bcaa","title":"ATE Test Engineer, Google Cloud","description":"Overview\nIn this role you will drive silicon test strategies for Google's TPU and related SoCs, collaborating with design and external vendors to ensure robust post-silicon testing. You will lead bring-up, verification, and qualification efforts across NPI programs, and optimize test coverage and yield in high-volume manufacturing. You’ll apply advanced ATE know-how to improve quality and reliability while shaping future hardware through feedback into architecture and design. This position offers the opportunity to influence TPU performance at scale and work with cross-functional teams across Google’s AI infrastructure initiatives.\n\nCompensation / Benefitsbonus target 15%equitybenefits\nResponsibilitiesDefine and implement silicon test requirements with design teams and external vendorsDevelop and execute strategies for SoC product NPI bring-up, verification, and qualification including bench test, troubleshooting, and test coverage optimizationCorrelate tests to PMDM and system-ATE data to drive quality improvements and defect reductionProvide back-stop production support, including test program upgrades, release procedures, volume data analytics, test time reduction, and yield improvementCollaborate with design, DFT, and quality teams to promote best practices for post-silicon testingIntegrate test components into manufacturing machinery and guide automated evaluation solutions for high-volume fabricationEnsure comprehensive verification depth across mass production and feed results back into architectural planning for future siliconPartner with internal groups to maintain product integrity and fast feedback loops into R&D\nKey requirementsBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; 4 years in test engineering or product engineering; experience in ASIC or SoC test development, bring-up, or debugCross-functional collaborationTroubleshooting and problem-solvingCommunication and documentationASIC/SoC test development and bring-upATPG/scan test development and memory BISTIP testing: PLLs, PVT sensors, PMRO, eFuse","company":"Google","rawCompany":"google","city":"San Jose","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-09-22T03:22:26.399Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"15-1253.00","title":"Software Quality Assurance Analysts and Testers","slug":"software-quality-assurance-analysts-and-testers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"}],"industries":[{"code":"513210","title":"Software Publishers","slug":"software-publishers"},{"code":"541511","title":"Custom Computer Programming Services","slug":"custom-computer-programming-services"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"ATE Test Engineer, Google Cloud","description":"Overview\nIn this role you will drive silicon test strategies for Google's TPU and related SoCs, collaborating with design and external vendors to ensure robust post-silicon testing. You will lead bring-up, verification, and qualification efforts across NPI programs, and optimize test coverage and yield in high-volume manufacturing. You’ll apply advanced ATE know-how to improve quality and reliability while shaping future hardware through feedback into architecture and design. This position offers the opportunity to influence TPU performance at scale and work with cross-functional teams across Google’s AI infrastructure initiatives.\n\nCompensation / Benefitsbonus target 15%equitybenefits\nResponsibilitiesDefine and implement silicon test requirements with design teams and external vendorsDevelop and execute strategies for SoC product NPI bring-up, verification, and qualification including bench test, troubleshooting, and test coverage optimizationCorrelate tests to PMDM and system-ATE data to drive quality improvements and defect reductionProvide back-stop production support, including test program upgrades, release procedures, volume data analytics, test time reduction, and yield improvementCollaborate with design, DFT, and quality teams to promote best practices for post-silicon testingIntegrate test components into manufacturing machinery and guide automated evaluation solutions for high-volume fabricationEnsure comprehensive verification depth across mass production and feed results back into architectural planning for future siliconPartner with internal groups to maintain product integrity and fast feedback loops into R&D\nKey requirementsBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; 4 years in test engineering or product engineering; experience in ASIC or SoC test development, bring-up, or debugCross-functional collaborationTroubleshooting and problem-solvingCommunication and documentationASIC/SoC test development and bring-upATPG/scan test development and memory BISTIP testing: PLLs, PVT sensors, PMRO, eFuse","datePosted":"2026-09-22T03:22:26.399Z","dateModified":"2026-09-22T03:22:26.399Z","hiringOrganization":{"@type":"Organization","name":"Google","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"fef861da3e8f5cdac2b4bcaa"},"url":"https://jobsearcher.com/jobs/fef861da3e8f5cdac2b4bcaa"}}