{"schemaVersion":"jobsearcher.job.v1","id":"f75caa8fe0de191eb6d242fa","url":"https://jobsearcher.com/jobs/f75caa8fe0de191eb6d242fa","canonicalUrl":"https://jobsearcher.com/jobs/f75caa8fe0de191eb6d242fa","title":"Memory Subsystem Design Verification Engineer","description":"Overview:\nWHAT YOU DO AT AMD CHANGES EVERYTHING\nAt AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.\nResponsibilities:\nTHE ROLE:\nThe Memory Subsystem team is hiring Verification Engineers to contribute to the definition, design, and development of high-speed LPDDR/DDR memory subsystem solutions and associated IP. This role includes verification across multiple product lines and pre-silicon production-level firmware co-verification using hybrid co-simulation environments and Universal Verification Methodology (UVM).\n\nTHE PERSON:\nIn this role, you will design and implement advanced verification environments for memory subsystems and associated IP using System Verilog and UVM methodologies. You will develop and maintain test benches, co-verification frameworks, and test suites aligned with evolving firmware features, ensuring comprehensive coverage and robust verification from IP and subsystem levels through production. Responsibilities include integrating and debugging Memory VIP, analyzing coverage metrics, managing regressions, and collaborating with cross-functional teams to deliver end-to-end verification solutions. You will also adapt to new tools and frameworks, contribute improvements, and document results to support efficient and scalable verification processes.\n\nKEY RESPONSIBILITES:\nProficiency in C/C++, System Verilog, UVM (object-oriented design), and scripting languages (e.g., Python, shell)\nExperience in IP and subsystem verification with System Verilog/UVM and VCS\nBackground in testbench architecture, microarchitecture, and co-verification with firmware\nKnowledge of code and functional coverage and how test plans map to cover goals\nAbility to design and debug co-verification environments for production-level firmware\nExperience developing transactor-based stimulus and maintaining test suites as features evolve\nAbility to learn new toolsets/frameworks and contribute updates\n\nPREFERRED EXPERIENCE:\nExperience building monitors/checkers and developing SVA/OVL and synthesizable assertions\nVerification experience with DDR/JEDEC standard IP, DDR PHY, or Memory Controllers\nExperience verifying subsystems/components and applying methodologies to achieve subsystem verification\nFamiliarity with architectural models and SystemC\nExperience with Zebu emulation for verification and debug\nFirmware/hardware co-verification using UVM System Verilog, C-DPI, and gasket‑structured testbenches\nMemory VIP integration, bring-up, and debug\nEnd-to-end verification experience from front-end through lab bring-up.\nUnderstanding of synchronization techniques (e.g., handshakes, message passing) and hardware-level clocking, including multi-domain simulation synchronization\nExperience with Git and Perforce\nManaging regressions and coverage databases\nSoC IP knowledge and a high-level understanding of the role and interfaces of each IP\n\nACADEMIC CREDENTIALS:\nBachelors or master's in electrical engineering, Computer Engineering, Computer Science, or a related field or equivalent practical experience in verification engineering.\n\nLOCATION:\nAustin, TX or Raleigh, NC\n\nThis role is not eligible for Visa sponsorship.\n\n#LI-DP1\n#LI-HYBRID\nQualifications:\nBenefits offered are described: AMD benefits at a glance.\n\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\n\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","company":"Advanced Micro Devices","rawCompany":"advanced micro devices","city":"Austin","state":"TX","isRemote":false,"isActive":false,"createdAt":"2026-04-14T10:44:01.963Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"541715","title":"Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)","slug":"research-and-development-in-the-physical-engineering-and-life-sciences-except-nanotechnology-and-biotechnology"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Memory Subsystem Design Verification Engineer","description":"Overview:\nWHAT YOU DO AT AMD CHANGES EVERYTHING\nAt AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.\nResponsibilities:\nTHE ROLE:\nThe Memory Subsystem team is hiring Verification Engineers to contribute to the definition, design, and development of high-speed LPDDR/DDR memory subsystem solutions and associated IP. This role includes verification across multiple product lines and pre-silicon production-level firmware co-verification using hybrid co-simulation environments and Universal Verification Methodology (UVM).\n\nTHE PERSON:\nIn this role, you will design and implement advanced verification environments for memory subsystems and associated IP using System Verilog and UVM methodologies. You will develop and maintain test benches, co-verification frameworks, and test suites aligned with evolving firmware features, ensuring comprehensive coverage and robust verification from IP and subsystem levels through production. Responsibilities include integrating and debugging Memory VIP, analyzing coverage metrics, managing regressions, and collaborating with cross-functional teams to deliver end-to-end verification solutions. You will also adapt to new tools and frameworks, contribute improvements, and document results to support efficient and scalable verification processes.\n\nKEY RESPONSIBILITES:\nProficiency in C/C++, System Verilog, UVM (object-oriented design), and scripting languages (e.g., Python, shell)\nExperience in IP and subsystem verification with System Verilog/UVM and VCS\nBackground in testbench architecture, microarchitecture, and co-verification with firmware\nKnowledge of code and functional coverage and how test plans map to cover goals\nAbility to design and debug co-verification environments for production-level firmware\nExperience developing transactor-based stimulus and maintaining test suites as features evolve\nAbility to learn new toolsets/frameworks and contribute updates\n\nPREFERRED EXPERIENCE:\nExperience building monitors/checkers and developing SVA/OVL and synthesizable assertions\nVerification experience with DDR/JEDEC standard IP, DDR PHY, or Memory Controllers\nExperience verifying subsystems/components and applying methodologies to achieve subsystem verification\nFamiliarity with architectural models and SystemC\nExperience with Zebu emulation for verification and debug\nFirmware/hardware co-verification using UVM System Verilog, C-DPI, and gasket‑structured testbenches\nMemory VIP integration, bring-up, and debug\nEnd-to-end verification experience from front-end through lab bring-up.\nUnderstanding of synchronization techniques (e.g., handshakes, message passing) and hardware-level clocking, including multi-domain simulation synchronization\nExperience with Git and Perforce\nManaging regressions and coverage databases\nSoC IP knowledge and a high-level understanding of the role and interfaces of each IP\n\nACADEMIC CREDENTIALS:\nBachelors or master's in electrical engineering, Computer Engineering, Computer Science, or a related field or equivalent practical experience in verification engineering.\n\nLOCATION:\nAustin, TX or Raleigh, NC\n\nThis role is not eligible for Visa sponsorship.\n\n#LI-DP1\n#LI-HYBRID\nQualifications:\nBenefits offered are described: AMD benefits at a glance.\n\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\n\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","datePosted":"2026-04-14T10:44:01.963Z","dateModified":"2026-04-14T10:44:01.963Z","hiringOrganization":{"@type":"Organization","name":"Advanced Micro Devices","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Austin","addressRegion":"TX","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"f75caa8fe0de191eb6d242fa"},"url":"https://jobsearcher.com/jobs/f75caa8fe0de191eb6d242fa"}}