{"schemaVersion":"jobsearcher.job.v1","id":"edb02898ef68da06f48a08ca","url":"https://jobsearcher.com/jobs/edb02898ef68da06f48a08ca","canonicalUrl":"https://jobsearcher.com/jobs/edb02898ef68da06f48a08ca","title":"IC Verification Engineer - SystemVerilog, UVM + Equity","description":"Broadcom Inc. is seeking a Design Verification Engineer in San Jose, California to create and deliver complex switch design verifications. Responsibilities include developing SystemVerilog-based environments and executing rigorous test plans for RTL and gatesim designs.\nThe ideal candidate possesses a master's degree in a technical field and at least six years of design verification experience. This role offers a competitive salary and comprehensive benefits package, including health insurance, 401(k), and stock purchase options.\n\n#J-18808-Ljbffr","company":"Broadcom","rawCompany":"broadcom","city":"San Jose","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-06-17T03:31:35.674Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"IC Verification Engineer - SystemVerilog, UVM + Equity","description":"Broadcom Inc. is seeking a Design Verification Engineer in San Jose, California to create and deliver complex switch design verifications. Responsibilities include developing SystemVerilog-based environments and executing rigorous test plans for RTL and gatesim designs.\nThe ideal candidate possesses a master's degree in a technical field and at least six years of design verification experience. This role offers a competitive salary and comprehensive benefits package, including health insurance, 401(k), and stock purchase options.\n\n#J-18808-Ljbffr","datePosted":"2026-06-17T03:31:35.674Z","dateModified":"2026-06-17T03:31:35.674Z","hiringOrganization":{"@type":"Organization","name":"Broadcom","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"edb02898ef68da06f48a08ca"},"url":"https://jobsearcher.com/jobs/edb02898ef68da06f48a08ca"}}