{"schemaVersion":"jobsearcher.job.v1","id":"ebe6a573fcc887d41c77c8d0","url":"https://jobsearcher.com/jobs/ebe6a573fcc887d41c77c8d0","canonicalUrl":"https://jobsearcher.com/jobs/ebe6a573fcc887d41c77c8d0","title":"Fellow Server CPU Validation Architect","description":"Overview:\nWHAT YOU DO AT AMD CHANGES EVERYTHING\nAt AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.\nResponsibilities:\nFellow Server CPU Validation Architect\n\nTHE TEAM\nOur Server Platform Solutions Engineering team is the ultimate gatekeeper for the quality of every server product we ship including functional, electrical, and security post-silicon validation responsibility. They work closely with design, product engineering, platform software, and hardware teams on optimized bring-up and execution strategies including ensuring functional correctness, electrical compliance/margins, and enabling customer use cases. The validation team engages from the beginning of any design project through post-launch.\nDuring the technical feasibility and development phases, Validation Architects ensure a product has the right controllability and observability features for testing and debugging. Emulation engineers must work closely with the design verification team and ensure content is ready and well tested in emulation before first silicon arrives in the lab.\nThe team develops the necessary tools and silicon/software hooks (e.g., DFx) to generate content with randomization, efficient failure debug, and automation infrastructure enabling the most efficient and effective execution and fastest path to launch. They embrace approaches such as “at-scale validation clusters” to ensure required quality.\nThe validation team has the pre-silicon responsibility of reviewing design milestones and qualifying these milestones for tape-out readiness. This requires quality checklists prepared collaboratively with partner teams. With the insights and knowledge developed during the development phase, the validation team will lead the bring-up efforts of any silicon in the lab.\n\nTHE PERSON\nAt the Fellow level, the Server CPU Validation Architect has business and technical acumen along with experience engaging with global validation organizations including engineering managers, program managers and specialized technical experts. They should have in-depth understanding of our product architecture and its requirements to meet our customer needs in terms of quality, schedule, and features. They will understand server silicon validation methodologies with experience in post silicon program ownership and a track record role-modeling a “zero customer escape” mentality. Quick responsiveness to customer needs, ability to clearly and crisply communicate issues, and discipline/passion in continuous improvement is expected.\nThe role will involve high level visibility of the most senior leaders inside and outside of the company. Strong executive level communication (verbal and written) and sound decision making is of utmost importance.\n\nTHE ROLE\nDrive the development of CPU validation strategy and test plan\nValidation coverage & content/framework developer – owner of test strategy and execution to consistently find hard to detect CPU/SoC architectural/design issues and manufacturing defects and greatly reduce the time to root cause and deploy necessary workarounds.\nEngage with technical leaders to identify and develop tools and methodologies for validating next-generation server CPU technologies including PCIE, CXL, coherent interconnects, etc.\nAt-scale validation strategist – top technical leader directing the usage of our global server farms to maximize overall quality as measured by customer impactful issues.\nSystem level emulation architect – priority setter and key strategist for emulation & prototyping.\nDrive requirements and priorities for automation capabilities needed for effective and timely execution of platform validation plan leading to product launch.\nForward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement throughout the team\nMaster debugger – “go-to” person for the toughest debug challenges involving security, power management, coherency, PCIE, memory, interrupts, etc. crossing the HW/SW boundaries. Draws on experience to drive continuous improvement in automated debug analysis methodologies and on-chip capabilities.\n\nEDUCATION AND EXPERIENCE\nBSEE, MSEE preferred\nUnderstanding of modern x86 microprocessor architecture and Server platform architecture\nExperience developing validation methodologies and infrastructure\nTest plan and test development experience\nParticipated in silicon bring-up and debug\nDebug skills at both SoC and system level\nFamiliarity with programming and scripting languages (C/C++, Python, ...)\nWorking knowledge of Server operating systems (Linux, Windows)\nSelf-driven team player who can work with minimal guidance\nAble to network, build relationships and drive effective decision-making across multiple functions and levels within the organization\nExcellent verbal and written English communication skills\nStrong analytical skills.\n\nLOCATION\nAustin, TX\nSanta Clara, CA\n\nThis role is not eligible for visa sponsorship.\n\n#LI-LM1\n#LI-HYBRID\nQualifications:\nBenefits offered are described: AMD benefits at a glance.\n\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\n\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","company":"Advanced Micro Devices","rawCompany":"advanced micro devices","city":"Santa Clara","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-04-14T11:14:25.429Z","occupations":[{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"518210","title":"Computing Infrastructure Providers, Data Processing, Web Hosting, and Related Services","slug":"computing-infrastructure-providers-data-processing-web-hosting-and-related-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Fellow Server CPU Validation Architect","description":"Overview:\nWHAT YOU DO AT AMD CHANGES EVERYTHING\nAt AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.\nResponsibilities:\nFellow Server CPU Validation Architect\n\nTHE TEAM\nOur Server Platform Solutions Engineering team is the ultimate gatekeeper for the quality of every server product we ship including functional, electrical, and security post-silicon validation responsibility. They work closely with design, product engineering, platform software, and hardware teams on optimized bring-up and execution strategies including ensuring functional correctness, electrical compliance/margins, and enabling customer use cases. The validation team engages from the beginning of any design project through post-launch.\nDuring the technical feasibility and development phases, Validation Architects ensure a product has the right controllability and observability features for testing and debugging. Emulation engineers must work closely with the design verification team and ensure content is ready and well tested in emulation before first silicon arrives in the lab.\nThe team develops the necessary tools and silicon/software hooks (e.g., DFx) to generate content with randomization, efficient failure debug, and automation infrastructure enabling the most efficient and effective execution and fastest path to launch. They embrace approaches such as “at-scale validation clusters” to ensure required quality.\nThe validation team has the pre-silicon responsibility of reviewing design milestones and qualifying these milestones for tape-out readiness. This requires quality checklists prepared collaboratively with partner teams. With the insights and knowledge developed during the development phase, the validation team will lead the bring-up efforts of any silicon in the lab.\n\nTHE PERSON\nAt the Fellow level, the Server CPU Validation Architect has business and technical acumen along with experience engaging with global validation organizations including engineering managers, program managers and specialized technical experts. They should have in-depth understanding of our product architecture and its requirements to meet our customer needs in terms of quality, schedule, and features. They will understand server silicon validation methodologies with experience in post silicon program ownership and a track record role-modeling a “zero customer escape” mentality. Quick responsiveness to customer needs, ability to clearly and crisply communicate issues, and discipline/passion in continuous improvement is expected.\nThe role will involve high level visibility of the most senior leaders inside and outside of the company. Strong executive level communication (verbal and written) and sound decision making is of utmost importance.\n\nTHE ROLE\nDrive the development of CPU validation strategy and test plan\nValidation coverage & content/framework developer – owner of test strategy and execution to consistently find hard to detect CPU/SoC architectural/design issues and manufacturing defects and greatly reduce the time to root cause and deploy necessary workarounds.\nEngage with technical leaders to identify and develop tools and methodologies for validating next-generation server CPU technologies including PCIE, CXL, coherent interconnects, etc.\nAt-scale validation strategist – top technical leader directing the usage of our global server farms to maximize overall quality as measured by customer impactful issues.\nSystem level emulation architect – priority setter and key strategist for emulation & prototyping.\nDrive requirements and priorities for automation capabilities needed for effective and timely execution of platform validation plan leading to product launch.\nForward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement throughout the team\nMaster debugger – “go-to” person for the toughest debug challenges involving security, power management, coherency, PCIE, memory, interrupts, etc. crossing the HW/SW boundaries. Draws on experience to drive continuous improvement in automated debug analysis methodologies and on-chip capabilities.\n\nEDUCATION AND EXPERIENCE\nBSEE, MSEE preferred\nUnderstanding of modern x86 microprocessor architecture and Server platform architecture\nExperience developing validation methodologies and infrastructure\nTest plan and test development experience\nParticipated in silicon bring-up and debug\nDebug skills at both SoC and system level\nFamiliarity with programming and scripting languages (C/C++, Python, ...)\nWorking knowledge of Server operating systems (Linux, Windows)\nSelf-driven team player who can work with minimal guidance\nAble to network, build relationships and drive effective decision-making across multiple functions and levels within the organization\nExcellent verbal and written English communication skills\nStrong analytical skills.\n\nLOCATION\nAustin, TX\nSanta Clara, CA\n\nThis role is not eligible for visa sponsorship.\n\n#LI-LM1\n#LI-HYBRID\nQualifications:\nBenefits offered are described: AMD benefits at a glance.\n\nAMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.\n\nAMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.\n\nThis posting is for an existing vacancy.","datePosted":"2026-04-14T11:14:25.429Z","dateModified":"2026-04-14T11:14:25.429Z","hiringOrganization":{"@type":"Organization","name":"Advanced Micro Devices","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Santa Clara","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"ebe6a573fcc887d41c77c8d0"},"url":"https://jobsearcher.com/jobs/ebe6a573fcc887d41c77c8d0"}}