{"schemaVersion":"jobsearcher.job.v1","id":"e7a66cf5afd8ef097ea3dcff","url":"https://jobsearcher.com/jobs/e7a66cf5afd8ef097ea3dcff","canonicalUrl":"https://jobsearcher.com/jobs/e7a66cf5afd8ef097ea3dcff","title":"Design Verification Engineer","description":"Title: Verification Engineer\nLocation: Santa Clara, CA (Hybrid)\nDuration: 12+ Months\nInterviews: 1 technical interview - virtual\nJOB DUTIES:\nParticipate in the functional verification of a Memory Controller IP and Subsystem.\nBe part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.\nBe responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.\nBe expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.\nBe familiar with hardware modeling and/or assertion-based verification methods.\nSupport all the parts of the verification lifecycle from planning to developing and maintaining code, debugging failures and supporting infrastructure like regressions and coverage.\nEXPERIENCE AND EDUCATION:\nUVM - System Verilog required\n5+ years’ work experience required\nWorked on complex SoC required\nStrong computer architecture knowledge required\nPrefer DRAM / Memory Controller experience\nB.S. in EE or Computing preferred\nJob Type: Contract\nPay: From $80.00 per hour\nExpected hours: 40 per week\nSchedule:\nMonday to Friday\nAbility to Commute:\nSanta Clara, CA 95054 (Preferred)\nAbility to Relocate:\nSanta Clara, CA 95054: Relocate before starting work (Preferred)\nWillingness to travel:\n75% (Preferred)\nWork Location: In person","company":"Buxton","rawCompany":"buxton","city":"San Jose","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-08-04T14:55:39.727Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Design Verification Engineer","description":"Title: Verification Engineer\nLocation: Santa Clara, CA (Hybrid)\nDuration: 12+ Months\nInterviews: 1 technical interview - virtual\nJOB DUTIES:\nParticipate in the functional verification of a Memory Controller IP and Subsystem.\nBe part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.\nBe responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.\nBe expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.\nBe familiar with hardware modeling and/or assertion-based verification methods.\nSupport all the parts of the verification lifecycle from planning to developing and maintaining code, debugging failures and supporting infrastructure like regressions and coverage.\nEXPERIENCE AND EDUCATION:\nUVM - System Verilog required\n5+ years’ work experience required\nWorked on complex SoC required\nStrong computer architecture knowledge required\nPrefer DRAM / Memory Controller experience\nB.S. in EE or Computing preferred\nJob Type: Contract\nPay: From $80.00 per hour\nExpected hours: 40 per week\nSchedule:\nMonday to Friday\nAbility to Commute:\nSanta Clara, CA 95054 (Preferred)\nAbility to Relocate:\nSanta Clara, CA 95054: Relocate before starting work (Preferred)\nWillingness to travel:\n75% (Preferred)\nWork Location: In person","datePosted":"2026-08-04T14:55:39.727Z","dateModified":"2026-08-04T14:55:39.727Z","hiringOrganization":{"@type":"Organization","name":"Buxton","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"e7a66cf5afd8ef097ea3dcff"},"url":"https://jobsearcher.com/jobs/e7a66cf5afd8ef097ea3dcff"}}