{"schemaVersion":"jobsearcher.job.v1","id":"e79a2b9d1ce9992198cbd247","url":"https://jobsearcher.com/jobs/e79a2b9d1ce9992198cbd247","canonicalUrl":"https://jobsearcher.com/jobs/e79a2b9d1ce9992198cbd247","title":"ASIC / VLSI Engineers","description":"ASIC / VLSI ENGINEERS – RTL / STA / PD / DV (Senior Level)\n\nWe are hiring 4 experienced ASIC / VLSI Engineers (8+ years) for full-time, onsite roles in Silicon Valley across advanced semiconductor and AI / networking programs.\n\nOpen roles:\nRTL Engineer (Networking / Ethernet)\nSTA Engineer\nPhysical Design Engineer\nDesign Verification Engineer\n\nCompensation up to $225K DOE + strong benefits + long-term project stability.\n\nWhat You Need (All Roles)\n8+ years of pre-silicon ASIC / VLSI experience\nStrong background in RTL-based design environments\nExperience at the SoC / full-chip level (not IP-only)\nSolid understanding of ASIC lifecycle (design\ntapeout)\nScripting experience (Python, Tcl, Perl, etc.)\nStrong digital logic fundamentals\n\nMust have:\nPre-silicon experience only (no post-silicon / firmware-only backgrounds)\n\nRole-Specific Requirements\n\nRTL Engineer (Networking)\nRTL design + microarchitecture\nEthernet (802.3), MAC / PCS / SerDes / PHY\nHigh-speed designs (100G+ preferred)\nTapeout + productization experience\n\nSTA Engineer\nSoC-level timing analysis & closure\nPrimeTime, Tempus, or similar\n\nPhysical Design Engineer\nFloorplanning, CTS, routing, signoff\nTiming, congestion, power optimization\n\nDesign Verification Engineer\nSoC-level verification (required)\nSystemVerilog / UVM\nFull verification lifecycle\n\nWhat Sets You Apart\nExperience with complex SoC / full-chip tapeouts\nAbility to work cross-functionally (RTL, DV, PD)\nBackground in advanced nodes (28nm and below preferred)\n﻿\nIf interested and QUALIFIED, please send resume in Microsoft Word format to: krissid@etechhi.com\n\nEtech Hi, Inc. is an equal opportunity employer/staffing firm and we are committed to providing a workplace free from harassment and discrimination. We celebrate the unique differences of our employees and candidates because that is what drives curiosity, innovation, and the success of our business. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, gender identity or expression, age, marital status, veteran status, disability status, pregnancy, parental status, genetic information, political affiliation, or any other status protected by the laws or regulations in the locations where we operate.\n\n#IND1\n\n#ZR","company":"Etech","rawCompany":"etech","city":"Milpitas","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-04-14T11:27:30.855Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"333242","title":"Semiconductor Machinery Manufacturing","slug":"semiconductor-machinery-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"ASIC / VLSI Engineers","description":"ASIC / VLSI ENGINEERS – RTL / STA / PD / DV (Senior Level)\n\nWe are hiring 4 experienced ASIC / VLSI Engineers (8+ years) for full-time, onsite roles in Silicon Valley across advanced semiconductor and AI / networking programs.\n\nOpen roles:\nRTL Engineer (Networking / Ethernet)\nSTA Engineer\nPhysical Design Engineer\nDesign Verification Engineer\n\nCompensation up to $225K DOE + strong benefits + long-term project stability.\n\nWhat You Need (All Roles)\n8+ years of pre-silicon ASIC / VLSI experience\nStrong background in RTL-based design environments\nExperience at the SoC / full-chip level (not IP-only)\nSolid understanding of ASIC lifecycle (design\ntapeout)\nScripting experience (Python, Tcl, Perl, etc.)\nStrong digital logic fundamentals\n\nMust have:\nPre-silicon experience only (no post-silicon / firmware-only backgrounds)\n\nRole-Specific Requirements\n\nRTL Engineer (Networking)\nRTL design + microarchitecture\nEthernet (802.3), MAC / PCS / SerDes / PHY\nHigh-speed designs (100G+ preferred)\nTapeout + productization experience\n\nSTA Engineer\nSoC-level timing analysis & closure\nPrimeTime, Tempus, or similar\n\nPhysical Design Engineer\nFloorplanning, CTS, routing, signoff\nTiming, congestion, power optimization\n\nDesign Verification Engineer\nSoC-level verification (required)\nSystemVerilog / UVM\nFull verification lifecycle\n\nWhat Sets You Apart\nExperience with complex SoC / full-chip tapeouts\nAbility to work cross-functionally (RTL, DV, PD)\nBackground in advanced nodes (28nm and below preferred)\n﻿\nIf interested and QUALIFIED, please send resume in Microsoft Word format to: krissid@etechhi.com\n\nEtech Hi, Inc. is an equal opportunity employer/staffing firm and we are committed to providing a workplace free from harassment and discrimination. We celebrate the unique differences of our employees and candidates because that is what drives curiosity, innovation, and the success of our business. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, gender identity or expression, age, marital status, veteran status, disability status, pregnancy, parental status, genetic information, political affiliation, or any other status protected by the laws or regulations in the locations where we operate.\n\n#IND1\n\n#ZR","datePosted":"2026-04-14T11:27:30.855Z","dateModified":"2026-04-14T11:27:30.855Z","hiringOrganization":{"@type":"Organization","name":"Etech","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Milpitas","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"e79a2b9d1ce9992198cbd247"},"url":"https://jobsearcher.com/jobs/e79a2b9d1ce9992198cbd247"}}