{"schemaVersion":"jobsearcher.job.v1","id":"e511933e4688cfeaecc70dbc","url":"https://jobsearcher.com/jobs/e511933e4688cfeaecc70dbc","canonicalUrl":"https://jobsearcher.com/jobs/e511933e4688cfeaecc70dbc","title":"Semiconductor Process Engineer","description":"ID: 58630\n1 Opening\nSanta Clara\n\nRole description\nSemiconductor Process Engineer\nAssociate III - Semiconductor S/W Product Development\n\nWho We Are:\nBorn digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding innovation and agility into everything they do. We help them create transformative experiences and human-centered solutions for a better world.\nUST is a mission-driven group of 29,000+ practical problem solvers and creative thinkers in more than 30 countries. Our entrepreneurial teams are empowered to innovate, act nimbly, and create a lasting and sustainable impact for our clients, their customers, and the communities in which we live.\nWith us, you’ll create a boundless impact that transforms your career—and the lives of people across the world.\nVisit us at UST.com.\n\nYou Are:\nThis is a Semiconductor Process / Defect Analysis Engineering role focused on wafer defect characterization and failure analysis in an R&D or semiconductor manufacturing environment.\n\nThe opportunity:\nDesign, collect data, analyze and compile reports on process engineering experiments for defect reduction, within safety guidelines\nTroubleshoot defect problems, perform Root Cause Analysis and resolve moderately difficult process engineering issues\nImplement new technology, products and analytical instrumentation to support the defect study\nDesign the failure analysis (FA) DOE for the key defect critical components to troubleshoot the wafer defect issue on the key R&D programs and major customer escalations\nPerform the FA, collect and analyze the data within safety guidelines\nCommunicate the FA observation and recommend the solution path in defect troubleshooting\nMeasure the wafer defect/film properties, organize data/reports for review in supporting the defectivity improvement by SEM/FIB\nPrepare wafers for experimentation, include cleaning, loading wafers. Prepare klarf files. Evaluate and recommend performance of process system.\n\nThis position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.\n\nWhat you need:\nExperience: 1-2 Years\nMain Skills\no SEM/FIB operation\no Failure Analysis (FA)\no Root Cause Analysis (RCA)\no Wafer defect analysis\no Defect metrology\no Semiconductor process troubleshooting\no DOE (Design of Experiments)\no Data analysis & reporting\nKey Knowledge\no Semiconductor wafer fabrication\no Yield improvement & defect reduction\no SEM/EDS/FIB principles\no Cleanroom & wafer handling\no Process engineering and metrology tools\nEducation\no Bachelor’s or Master’s in:\nElectrical Engineering\nMaterials Science\nChemical Engineering\nPhysics\nMicroelectronics/Nanotechnology\n\nCompensation can differ depending on factors including but not limited to the specific office location, role, skill set, education, and level of experience. UST provides a reasonable range of compensation for roles that may be hired in various U.S. markets as set forth below.\nRole Location: California\nCompensation Range: $70,000-$105,000\n\nBenefits\nFull-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits. Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.\nPart-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching.\nFull-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.\nPart-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).\nAll US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.\n\nWhat we believe:\nWe proudly embrace the values that have shaped UST since day one. We build our culture of Humility, Humanity, and Integrity. These values inspire us to nurture a people-first, human centric culture that fosters diversity, prioritizes sustainable solutions, and keeps our people and clients at the forefront of all decisions.\n\nHumility:\nWe will listen, learn, be empathetic and help selflessly in our interactions with everyone.\nHumanity:\nThrough business, we will better the lives of those less fortunate than ourselves.\nIntegrity:\nWe honor our commitments and act with responsibility in all our relationships.\n\nEqual Employment Opportunity Statement\n\nUST is an Equal Opportunity Employer.\n\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, status as a protected veteran, or any other applicable characteristics protected by law. We will consider qualified applicants with arrest or conviction records in accordance with state and local laws and “fair chance” ordinances.\nUST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.\n\n#UST\n#LI-MK2\nSkills\nsemiconductor product development,process engineering,wafer defect characterization,failure analysis,\nBenefits\nCompensation range: $ 70,000.00 to 105,000.00 per year\n\nAbout UST\nUST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.","company":"Ust Global","rawCompany":"ust global","city":"San Jose","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-07-19T14:46:37.723Z","occupations":[{"code":"51-9141.00","title":"Semiconductor Processing Technicians","slug":"semiconductor-processing-technicians"},{"code":"17-2131.00","title":"Materials Engineers","slug":"materials-engineers"},{"code":"17-2199.06","title":"Microsystems Engineers","slug":"microsystems-engineers"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"333242","title":"Semiconductor Machinery Manufacturing","slug":"semiconductor-machinery-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Semiconductor Process Engineer","description":"ID: 58630\n1 Opening\nSanta Clara\n\nRole description\nSemiconductor Process Engineer\nAssociate III - Semiconductor S/W Product Development\n\nWho We Are:\nBorn digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding innovation and agility into everything they do. We help them create transformative experiences and human-centered solutions for a better world.\nUST is a mission-driven group of 29,000+ practical problem solvers and creative thinkers in more than 30 countries. Our entrepreneurial teams are empowered to innovate, act nimbly, and create a lasting and sustainable impact for our clients, their customers, and the communities in which we live.\nWith us, you’ll create a boundless impact that transforms your career—and the lives of people across the world.\nVisit us at UST.com.\n\nYou Are:\nThis is a Semiconductor Process / Defect Analysis Engineering role focused on wafer defect characterization and failure analysis in an R&D or semiconductor manufacturing environment.\n\nThe opportunity:\nDesign, collect data, analyze and compile reports on process engineering experiments for defect reduction, within safety guidelines\nTroubleshoot defect problems, perform Root Cause Analysis and resolve moderately difficult process engineering issues\nImplement new technology, products and analytical instrumentation to support the defect study\nDesign the failure analysis (FA) DOE for the key defect critical components to troubleshoot the wafer defect issue on the key R&D programs and major customer escalations\nPerform the FA, collect and analyze the data within safety guidelines\nCommunicate the FA observation and recommend the solution path in defect troubleshooting\nMeasure the wafer defect/film properties, organize data/reports for review in supporting the defectivity improvement by SEM/FIB\nPrepare wafers for experimentation, include cleaning, loading wafers. Prepare klarf files. Evaluate and recommend performance of process system.\n\nThis position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.\n\nWhat you need:\nExperience: 1-2 Years\nMain Skills\no SEM/FIB operation\no Failure Analysis (FA)\no Root Cause Analysis (RCA)\no Wafer defect analysis\no Defect metrology\no Semiconductor process troubleshooting\no DOE (Design of Experiments)\no Data analysis & reporting\nKey Knowledge\no Semiconductor wafer fabrication\no Yield improvement & defect reduction\no SEM/EDS/FIB principles\no Cleanroom & wafer handling\no Process engineering and metrology tools\nEducation\no Bachelor’s or Master’s in:\nElectrical Engineering\nMaterials Science\nChemical Engineering\nPhysics\nMicroelectronics/Nanotechnology\n\nCompensation can differ depending on factors including but not limited to the specific office location, role, skill set, education, and level of experience. UST provides a reasonable range of compensation for roles that may be hired in various U.S. markets as set forth below.\nRole Location: California\nCompensation Range: $70,000-$105,000\n\nBenefits\nFull-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty. They are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits. Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines. Benefits offerings vary in Puerto Rico.\nPart-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) Retirement Plan with employer matching.\nFull-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company’s 401(k) program with employer matching. They and their dependents residing in the US are eligible for medical, dental, and vision insurance.\nPart-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).\nAll US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.\n\nWhat we believe:\nWe proudly embrace the values that have shaped UST since day one. We build our culture of Humility, Humanity, and Integrity. These values inspire us to nurture a people-first, human centric culture that fosters diversity, prioritizes sustainable solutions, and keeps our people and clients at the forefront of all decisions.\n\nHumility:\nWe will listen, learn, be empathetic and help selflessly in our interactions with everyone.\nHumanity:\nThrough business, we will better the lives of those less fortunate than ourselves.\nIntegrity:\nWe honor our commitments and act with responsibility in all our relationships.\n\nEqual Employment Opportunity Statement\n\nUST is an Equal Opportunity Employer.\n\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, status as a protected veteran, or any other applicable characteristics protected by law. We will consider qualified applicants with arrest or conviction records in accordance with state and local laws and “fair chance” ordinances.\nUST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.\n\n#UST\n#LI-MK2\nSkills\nsemiconductor product development,process engineering,wafer defect characterization,failure analysis,\nBenefits\nCompensation range: $ 70,000.00 to 105,000.00 per year\n\nAbout UST\nUST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.","datePosted":"2026-07-19T14:46:37.723Z","dateModified":"2026-07-19T14:46:37.723Z","hiringOrganization":{"@type":"Organization","name":"Ust Global","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"e511933e4688cfeaecc70dbc"},"url":"https://jobsearcher.com/jobs/e511933e4688cfeaecc70dbc"}}