{"schemaVersion":"jobsearcher.job.v1","id":"d779b5d64c81ad7f25b2a35b","url":"https://jobsearcher.com/jobs/d779b5d64c81ad7f25b2a35b","canonicalUrl":"https://jobsearcher.com/jobs/d779b5d64c81ad7f25b2a35b","title":"Digital Design Implementation Engineer","description":"Company Description Tej Systems LLC is a technology-focused company specializing in advanced digital design and engineering solutions for a range of electronic systems. The organization emphasizes high-quality design practices, innovation, and collaboration to deliver reliable and efficient products for its clients. Team members work on cutting-edge projects in semiconductor, electronics, and embedded system domains. Tej Systems LLC values integrity, technical excellence, and continuous learning, providing an environment where engineers can grow their skills and contribute to impactful solutions.Key Responsibilities: • Perform ASIC design implementation across one or more areas, including logic synthesis, static timing analysis (STA), and place and route (PnR).• Develop, maintain, and optimize design implementation flows, methodologies, and automation scripts.• Drive timing, power, and area (PPA) optimization and closure to achieve design performance and implementation objectives.• Execute timing signoff activities, including developing and validating Synopsys Design Constraints (SDC), analyzing timing reports, and resolving timing violations.• Collaborate closely with RTL design, Design for Test (DFT), and physical design engineering teams to identify and resolve implementation challenges.• Support silicon bring-up, validation, and commercialization activities.• Contribute to continuous improvements in design quality, implementation efficiency, and engineering workflows.Qualifications: Required• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.• Minimum of 2 years of hands-on ASIC design implementation experience in at least one of the following areas: static timing analysis (STA), logic synthesis, or place and route (PnR).• Experience with industry-standard electronic design automation (EDA) tools, such as:- Synopsys Design Compiler, Fusion Compiler, or PrimeTime.- Cadence Genus, Innovus, or Tempus.• Strong understanding of digital design fundamentals, timing analysis concepts, and design constraints.• Proficiency in scripting languages such as Tcl, Python, Perl, or shell scripting.• Strong analytical, problem-solving, and troubleshooting skills.• Excellent written and verbal communication skills, with the ability to collaborate effectively across multidisciplinary engineering teams.• Demonstrated teamwork, initiative, dedication, and strong interpersonal skills.Preferred• Experience implementing high-speed digital designs, including SerDes, high-speed PHY, or high-frequency digital blocks.• Experience working with advanced semiconductor process nodes.• Familiarity with clock tree synthesis (CTS) and multi-corner, multi-mode (MCMM) timing analysis and closure.• Knowledge of low-power design methodologies, including Unified Power Format (UPF).• Familiarity with physical verification and signoff methodologies, including IR drop and electromigration (EM) analysis.","company":"Tej Systems","rawCompany":"tej systems","city":"San Jose","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-11-13T09:25:08.869Z","occupations":[{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2071.00","title":"Electrical Engineers","slug":"electrical-engineers"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"541330","title":"Engineering Services","slug":"engineering-services"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Digital Design Implementation Engineer","description":"Company Description Tej Systems LLC is a technology-focused company specializing in advanced digital design and engineering solutions for a range of electronic systems. The organization emphasizes high-quality design practices, innovation, and collaboration to deliver reliable and efficient products for its clients. Team members work on cutting-edge projects in semiconductor, electronics, and embedded system domains. Tej Systems LLC values integrity, technical excellence, and continuous learning, providing an environment where engineers can grow their skills and contribute to impactful solutions.Key Responsibilities: • Perform ASIC design implementation across one or more areas, including logic synthesis, static timing analysis (STA), and place and route (PnR).• Develop, maintain, and optimize design implementation flows, methodologies, and automation scripts.• Drive timing, power, and area (PPA) optimization and closure to achieve design performance and implementation objectives.• Execute timing signoff activities, including developing and validating Synopsys Design Constraints (SDC), analyzing timing reports, and resolving timing violations.• Collaborate closely with RTL design, Design for Test (DFT), and physical design engineering teams to identify and resolve implementation challenges.• Support silicon bring-up, validation, and commercialization activities.• Contribute to continuous improvements in design quality, implementation efficiency, and engineering workflows.Qualifications: Required• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.• Minimum of 2 years of hands-on ASIC design implementation experience in at least one of the following areas: static timing analysis (STA), logic synthesis, or place and route (PnR).• Experience with industry-standard electronic design automation (EDA) tools, such as:- Synopsys Design Compiler, Fusion Compiler, or PrimeTime.- Cadence Genus, Innovus, or Tempus.• Strong understanding of digital design fundamentals, timing analysis concepts, and design constraints.• Proficiency in scripting languages such as Tcl, Python, Perl, or shell scripting.• Strong analytical, problem-solving, and troubleshooting skills.• Excellent written and verbal communication skills, with the ability to collaborate effectively across multidisciplinary engineering teams.• Demonstrated teamwork, initiative, dedication, and strong interpersonal skills.Preferred• Experience implementing high-speed digital designs, including SerDes, high-speed PHY, or high-frequency digital blocks.• Experience working with advanced semiconductor process nodes.• Familiarity with clock tree synthesis (CTS) and multi-corner, multi-mode (MCMM) timing analysis and closure.• Knowledge of low-power design methodologies, including Unified Power Format (UPF).• Familiarity with physical verification and signoff methodologies, including IR drop and electromigration (EM) analysis.","datePosted":"2026-11-13T09:25:08.869Z","dateModified":"2026-11-13T09:25:08.869Z","hiringOrganization":{"@type":"Organization","name":"Tej Systems","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"d779b5d64c81ad7f25b2a35b"},"url":"https://jobsearcher.com/jobs/d779b5d64c81ad7f25b2a35b"}}