{"schemaVersion":"jobsearcher.job.v1","id":"c8d8ceabe41f85e4cac993c8","url":"https://jobsearcher.com/jobs/c8d8ceabe41f85e4cac993c8","canonicalUrl":"https://jobsearcher.com/jobs/c8d8ceabe41f85e4cac993c8","title":"Virtual Platform Hardware Modeling Engineer","description":"Job Description\n\nWe are seeking a modeling Engineer to develop high-level models of complex SoC hardware. The virtual platforms combine models of custom hardware accelerators for vision, 2D and 3D graphics, machine learning and more, within a multi-core, multi-level memory hierarchy SoC architecture, and serve as the primary simulation vehicle for system software and firmware. The ideal candidate will be proficient in hardware simulation using C++, and understand the firmware development processes.ResponsibilitiesDesign and develop SystemC TLM models to accurately represent the SoC architecture integrating emulated processors, DSPs, Network-on-Chip, DMA and memory controllers, etc...Integrate first-party and vendor models into the Virtual Platform, develop automated workflows to ensure register-level accuracy and complete connectivity at the SoC level, minimizing manual intervention and enabling continuous integration.Collaborate with silicon architects, digital designers and verification engineers to design and develop high-fidelity, fast C++ models for first-party IP.Coordinate virtual platforms with hardware development programs, validating multiple SoCs and architectural changes with system software and firmware engineering, enabling end-to-end silicon validation test frameworks.Enhance the virtual platforms to enable SoC and system architecture exploration by instrumenting models for power and performance metrics, allowing for data-driven design decisions and trade-off analysis to optimize system performance and power consumption.Minimum qualificationsB.S. degree in Computer Science or Electrical Engineering or equivalent experience.2+ years experience in hardware model simulation, virtual platform, performance modeling of complex SoCs or high-fidelity hardware accelerators.High proficiency in modern C++ in the domains of chip-design, electronic design automation or simulation.General familiarity with SoC components: embedded processors such as ARM A/M series, Risc-V, DSP, DMA, Cache Hierarchy, DRAM, Network-on-chip, AMBA protocols. Extensive experience in at least one of these areas.Experience with modern buildframeworks and continuous integration systems, such as CMake, Bazel and CI frameworks such as Jenkins, GitLab CI/CD.Experience with debugging and profiling tools, such as GDB or other debuggersPreferred qualificationsExperience with the SystemC/TLM libraryExperience with virtual platform development tools and frameworks, such as Synopsys Virtualizer, Cadence Virtual Platform, Imperas OVP, or ARM Fast ModelsFamiliarity with processor/DSP architectures, such as ARM, RISC-V, and XTensaFamiliarity with NoC, MMU, address translations, and cache modelingFamiliarity with the standard C++ concurrency support library: threads, atomic operations, memory ordering, etc...Proficiency in Python to automate design flows, creation of collateral dataExperience with high level C/C++ synthesis (HLS)Working knowledge of VerilogCalifornia Pay Range$70—$75 USD","company":"Phizenix","rawCompany":"phizenix","city":"Sunnyvale","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-04-09T11:19:04.673Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"541715","title":"Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)","slug":"research-and-development-in-the-physical-engineering-and-life-sciences-except-nanotechnology-and-biotechnology"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Virtual Platform Hardware Modeling Engineer","description":"Job Description\n\nWe are seeking a modeling Engineer to develop high-level models of complex SoC hardware. The virtual platforms combine models of custom hardware accelerators for vision, 2D and 3D graphics, machine learning and more, within a multi-core, multi-level memory hierarchy SoC architecture, and serve as the primary simulation vehicle for system software and firmware. The ideal candidate will be proficient in hardware simulation using C++, and understand the firmware development processes.ResponsibilitiesDesign and develop SystemC TLM models to accurately represent the SoC architecture integrating emulated processors, DSPs, Network-on-Chip, DMA and memory controllers, etc...Integrate first-party and vendor models into the Virtual Platform, develop automated workflows to ensure register-level accuracy and complete connectivity at the SoC level, minimizing manual intervention and enabling continuous integration.Collaborate with silicon architects, digital designers and verification engineers to design and develop high-fidelity, fast C++ models for first-party IP.Coordinate virtual platforms with hardware development programs, validating multiple SoCs and architectural changes with system software and firmware engineering, enabling end-to-end silicon validation test frameworks.Enhance the virtual platforms to enable SoC and system architecture exploration by instrumenting models for power and performance metrics, allowing for data-driven design decisions and trade-off analysis to optimize system performance and power consumption.Minimum qualificationsB.S. degree in Computer Science or Electrical Engineering or equivalent experience.2+ years experience in hardware model simulation, virtual platform, performance modeling of complex SoCs or high-fidelity hardware accelerators.High proficiency in modern C++ in the domains of chip-design, electronic design automation or simulation.General familiarity with SoC components: embedded processors such as ARM A/M series, Risc-V, DSP, DMA, Cache Hierarchy, DRAM, Network-on-chip, AMBA protocols. Extensive experience in at least one of these areas.Experience with modern buildframeworks and continuous integration systems, such as CMake, Bazel and CI frameworks such as Jenkins, GitLab CI/CD.Experience with debugging and profiling tools, such as GDB or other debuggersPreferred qualificationsExperience with the SystemC/TLM libraryExperience with virtual platform development tools and frameworks, such as Synopsys Virtualizer, Cadence Virtual Platform, Imperas OVP, or ARM Fast ModelsFamiliarity with processor/DSP architectures, such as ARM, RISC-V, and XTensaFamiliarity with NoC, MMU, address translations, and cache modelingFamiliarity with the standard C++ concurrency support library: threads, atomic operations, memory ordering, etc...Proficiency in Python to automate design flows, creation of collateral dataExperience with high level C/C++ synthesis (HLS)Working knowledge of VerilogCalifornia Pay Range$70—$75 USD","datePosted":"2026-04-09T11:19:04.673Z","dateModified":"2026-04-09T11:19:04.673Z","hiringOrganization":{"@type":"Organization","name":"Phizenix","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"c8d8ceabe41f85e4cac993c8"},"url":"https://jobsearcher.com/jobs/c8d8ceabe41f85e4cac993c8"}}