{"schemaVersion":"jobsearcher.job.v1","id":"c651252ad6bb7ce3003f4983","url":"https://jobsearcher.com/jobs/c651252ad6bb7ce3003f4983","canonicalUrl":"https://jobsearcher.com/jobs/c651252ad6bb7ce3003f4983","title":"Formal Verification Engineer","description":"Acceler8 Talent is partnering with an early‑stage AI hardware startup to hire a Formal Verification Engineer to help redesign AI datacenter infrastructure and silicon.\n\nAs the first Formal Verification hire, you'll own the formal verification strategy for critical blocks and SoC‑level functionality, proving correctness on complex hardware while helping shape verification methodologies from first silicon through future generations of our platform. You'll work closely with architecture, RTL, and software teams, and have the opportunity to leverage cutting‑edge AI‑assisted verification workflows to solve problems that don't have established playbooks.\n\nWhat You'll Do\n\nOwn block‑and SoC‑level formal verification for AI accelerator silicon, from property development through proof convergence.\n\nDevelop SystemVerilog Assertions (SVA) and formal verification environments to verify complex microarchitectural and system‑level behavior.\n\nDebug proof failures, identify root causes, and collaborate with RTL designers and architects to drive closure.\n\nBuild and improve formal verification methodologies, infrastructure, and AI‑assisted verification flows, including AI agents that accelerate proof generation and convergence.\n\nApply formal techniques throughout the development cycle, from early architectural validation through silicon bring‑up readiness.\n\nPartner closely with design, verification, and software teams to ensure robust, scalable hardware.\n\nWhat They're Looking For\n\nMaster's degree (or equivalent experience) plus 8+ years of experience in formal verification for complex SoCs.\n\nDeep expertise in formal verification methodologies, including property authoring (SVA and/or PSL), proof strategies, abstraction techniques, and convergence.\n\nStrong experience debugging formal failures and working directly with RTL designers to resolve issues.\n\nHands‑on experience with industry‑standard formal verification tools such as Synopsys VC Formal, Cadence JasperGold, or equivalent.\n\nStrong understanding of modern digital design and microarchitecture.\n\nNice to Have\n\nExperience with processor verification or security verification.\n\nEquivalence checking (LEC/SEC) experience.\n\nAMS verification or IP verification flow experience.\n\nExperience building automation or AI‑assisted verification workflows.\n\nWhy Join?\n\nOwn verification for critical AI accelerator hardware at an early‑stage company.\n\nWork on technically ambitious silicon with significant architectural influence.\n\nHelp define next‑generation AI‑assisted formal verification methodologies.\n\nCollaborate with a small, highly experienced team building cutting‑edge AI infrastructure from the ground up.\n\nSkills\nFormal Verification, SystemVerilog Assertions (SVA), Property Checking, Cadence JasperGold, Synopsys VC Formal, SoC Verification, ASIC Verification, Equivalence Checking (LEC/SEC), RTL Verification, Proof Convergence\n\n#J-18808-Ljbffr","company":"Acceler8 Talent","rawCompany":"acceler8 talent","city":"Millbrae","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-07-18T03:21:05.377Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"541511","title":"Custom Computer Programming Services","slug":"custom-computer-programming-services"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Formal Verification Engineer","description":"Acceler8 Talent is partnering with an early‑stage AI hardware startup to hire a Formal Verification Engineer to help redesign AI datacenter infrastructure and silicon.\n\nAs the first Formal Verification hire, you'll own the formal verification strategy for critical blocks and SoC‑level functionality, proving correctness on complex hardware while helping shape verification methodologies from first silicon through future generations of our platform. You'll work closely with architecture, RTL, and software teams, and have the opportunity to leverage cutting‑edge AI‑assisted verification workflows to solve problems that don't have established playbooks.\n\nWhat You'll Do\n\nOwn block‑and SoC‑level formal verification for AI accelerator silicon, from property development through proof convergence.\n\nDevelop SystemVerilog Assertions (SVA) and formal verification environments to verify complex microarchitectural and system‑level behavior.\n\nDebug proof failures, identify root causes, and collaborate with RTL designers and architects to drive closure.\n\nBuild and improve formal verification methodologies, infrastructure, and AI‑assisted verification flows, including AI agents that accelerate proof generation and convergence.\n\nApply formal techniques throughout the development cycle, from early architectural validation through silicon bring‑up readiness.\n\nPartner closely with design, verification, and software teams to ensure robust, scalable hardware.\n\nWhat They're Looking For\n\nMaster's degree (or equivalent experience) plus 8+ years of experience in formal verification for complex SoCs.\n\nDeep expertise in formal verification methodologies, including property authoring (SVA and/or PSL), proof strategies, abstraction techniques, and convergence.\n\nStrong experience debugging formal failures and working directly with RTL designers to resolve issues.\n\nHands‑on experience with industry‑standard formal verification tools such as Synopsys VC Formal, Cadence JasperGold, or equivalent.\n\nStrong understanding of modern digital design and microarchitecture.\n\nNice to Have\n\nExperience with processor verification or security verification.\n\nEquivalence checking (LEC/SEC) experience.\n\nAMS verification or IP verification flow experience.\n\nExperience building automation or AI‑assisted verification workflows.\n\nWhy Join?\n\nOwn verification for critical AI accelerator hardware at an early‑stage company.\n\nWork on technically ambitious silicon with significant architectural influence.\n\nHelp define next‑generation AI‑assisted formal verification methodologies.\n\nCollaborate with a small, highly experienced team building cutting‑edge AI infrastructure from the ground up.\n\nSkills\nFormal Verification, SystemVerilog Assertions (SVA), Property Checking, Cadence JasperGold, Synopsys VC Formal, SoC Verification, ASIC Verification, Equivalence Checking (LEC/SEC), RTL Verification, Proof Convergence\n\n#J-18808-Ljbffr","datePosted":"2026-07-18T03:21:05.377Z","dateModified":"2026-07-18T03:21:05.377Z","hiringOrganization":{"@type":"Organization","name":"Acceler8 Talent","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Millbrae","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"c651252ad6bb7ce3003f4983"},"url":"https://jobsearcher.com/jobs/c651252ad6bb7ce3003f4983"}}