{"schemaVersion":"jobsearcher.job.v1","id":"bf858c37b8035a8f321e4d3c","url":"https://jobsearcher.com/jobs/bf858c37b8035a8f321e4d3c","canonicalUrl":"https://jobsearcher.com/jobs/bf858c37b8035a8f321e4d3c","title":"DFT Verification Engineer: RTL & Debug","description":"L&T Technology Services (LTTS) in San Francisco, CA seeks a DFT Verification Engineer with strong RTL and gate-level debugging skills using Verilog/SystemVerilog, simulation, and waveform analysis. The role focuses on pre-silicon and post-silicon verification and debugging of scan and DFT architectures.\nResponsibilities include integrating Tessent JTAG/SSN, developing verification plans, and building automation to improve efficiency.\n\n#J-18808-Ljbffr","company":"Intelliswift","rawCompany":"intelliswift","city":"Millbrae","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-10-29T03:47:26.895Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-3023.00","title":"Electrical and Electronic Engineering Technologists and Technicians","slug":"electrical-and-electronic-engineering-technologists-and-technicians"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"},{"code":"333242","title":"Semiconductor Machinery Manufacturing","slug":"semiconductor-machinery-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"DFT Verification Engineer: RTL & Debug","description":"L&T Technology Services (LTTS) in San Francisco, CA seeks a DFT Verification Engineer with strong RTL and gate-level debugging skills using Verilog/SystemVerilog, simulation, and waveform analysis. The role focuses on pre-silicon and post-silicon verification and debugging of scan and DFT architectures.\nResponsibilities include integrating Tessent JTAG/SSN, developing verification plans, and building automation to improve efficiency.\n\n#J-18808-Ljbffr","datePosted":"2026-10-29T03:47:26.895Z","dateModified":"2026-10-29T03:47:26.895Z","hiringOrganization":{"@type":"Organization","name":"Intelliswift","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Millbrae","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"bf858c37b8035a8f321e4d3c"},"url":"https://jobsearcher.com/jobs/bf858c37b8035a8f321e4d3c"}}