{"schemaVersion":"jobsearcher.job.v1","id":"b8fca8affc9d1e4db53849c1","url":"https://jobsearcher.com/jobs/b8fca8affc9d1e4db53849c1","canonicalUrl":"https://jobsearcher.com/jobs/b8fca8affc9d1e4db53849c1","title":"Principal RFIC Design Engineer","description":"About Oso Semiconductor\nOso Semiconductor is an early‑stage fabless semiconductor company developing next‑generation mmWave beamforming technology. Founded by UC Berkeley PhDs, our proprietary RFIC architecture delivers 2–4x power reduction for phased array systems across satellite communication (SATCOM), 5G, and radar. We’ve raised Series A funding, secured our first defense and commercial customers, and are preparing to scale the team 3X.\n\nThe Role\nWe’re looking for a Principal RFIC Design Engineer to join the core design team. You’ll design, simulate, and validate mmWave front‑end circuit blocks for our next‑generation beamformer chips—including LNAs, PAs, phase shifters, VGAs, and complete transceiver signal chains.\n\nThis is a senior technical role with significant design ownership. You’ll work directly with the founding engineers, contribute to architecture decisions, and see your designs go from schematic to silicon to customer products.\n\nResponsibilities\n\nDesign mmWave front‑end circuit blocks (PAs, LNAs, phase shifters, VGAs, mixers) in advanced CMOS or RFSOI (SiGe and III‑V processes are a plus).\n\nPerform transistor‑level schematic design, simulation, and optimization using Cadence Virtuoso (Spectre, ADE).\n\nConduct full‑custom IC layout or direct layout engineers, ensuring DRC/LVS‑clean designs at mmWave frequencies.\n\nPerform post‑layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to validate performance through parasitics.\n\nCollaborate on chip‑level architecture and system partitioning for multi‑channel beamformer ICs.\n\nSupport silicon bring‑up, bench characterization, and debugging of fabricated chips.\n\nContribute to tapeout preparation, design reviews, and documentation.\n\nMentor junior RFIC designers and contribute to a culture of technical excellence.\n\nRequired Qualifications\n\nMS + 5 years industry experience or PhD + 2 years industry experience in Electrical Engineering with a focus on RF/mmWave IC design.\n\nDemonstrated expertise in at least two of: PA, LNA, phase shifter, VGA, mixer, or frequency multiplier design at mmWave frequencies.\n\nExpert proficiency with Cadence EDA suite (Virtuoso, ADE, and Layout) and EM simulation tools (Ansys HFSS, EMX, or ADS Momentum).\n\nExperience with at least one full tapeout cycle: schematic to layout to fabrication to bring‑up to characterization.\n\nStrong understanding of mmWave transmission line theory, matching networks, and on‑chip passive design.\n\nTrack record of published work or shipped products demonstrating circuit design excellence.\n\nPreferred Qualifications\n\nExperience with phased array or multi‑channel beamformer IC design.\n\nBackground in SATCOM, 5G NR FR2, or automotive radar mmWave applications.\n\nExperience in SOI nodes with high resistivity substrates.\n\nFamiliar with system‑level RF specs: EVM, P1dB, noise figure, IP3, EIRP, and G/T.\n\nExperience in a startup or small‑team environment with high design ownership.\n\nStrong communication skills and ability to present design tradeoffs clearly.\n\nWhy Oso Semi?\n\nDesign ownership: You own blocks from concept to silicon.\n\nSmall team: Your voice matters in every architecture decision.\n\nCutting‑edge process: Advanced nodes for mmWave—the hardest corner of IC design.\n\nMeaningful equity: Competitive stock option grant. Early engineers capture real value.\n\nUC Berkeley DNA: Founded by PhDs published in IEEE conferences and journals.\n\nFirst Principles Innovation: Multiple patents providing 2-4x reductions in power.\n\nEstablished Traction: Signed multi‑year, high‑volume customer agreements in defense and commercial markets (SATCOM, radar, and 5G).\n\nWhat We Offer\n\nEquity: Stock option grant with 4‑year vesting and 1‑year cliff.\n\nMedical, Dental & Vision: Comprehensive health coverage with employer‑sponsored medical, dental, and vision plans.\n\nHybrid Schedule: Monday–Wednesday in office.\n\nTime Off: Unlimited PTO.\n\n401(k): Employer‑matched retirement plan.\n\nParental Leave: Equal parental leave for all parents.\n\nTeam Culture: Regular team lunches, events, and celebrations.\n\nLife Insurance: Company‑paid life insurance.\n\nFSA & HSA: Flexible spending and health savings account options available.\n\nCommuter Benefits: Pre‑tax transit and parking benefits.\n\nOso Semiconductor is an equal opportunity employer. We consider all qualified applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic.\n\n#J-18808-Ljbffr","company":"Mixmode","rawCompany":"mixmode","city":"Mountain View","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-06-17T04:22:24.696Z","occupations":[{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"},{"code":"15-1241.01","title":"Telecommunications Engineering Specialists","slug":"telecommunications-engineering-specialists"}],"industries":[{"code":"334220","title":"Radio and Television Broadcasting and Wireless Communications Equipment Manufacturing","slug":"radio-and-television-broadcasting-and-wireless-communications-equipment-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Principal RFIC Design Engineer","description":"About Oso Semiconductor\nOso Semiconductor is an early‑stage fabless semiconductor company developing next‑generation mmWave beamforming technology. Founded by UC Berkeley PhDs, our proprietary RFIC architecture delivers 2–4x power reduction for phased array systems across satellite communication (SATCOM), 5G, and radar. We’ve raised Series A funding, secured our first defense and commercial customers, and are preparing to scale the team 3X.\n\nThe Role\nWe’re looking for a Principal RFIC Design Engineer to join the core design team. You’ll design, simulate, and validate mmWave front‑end circuit blocks for our next‑generation beamformer chips—including LNAs, PAs, phase shifters, VGAs, and complete transceiver signal chains.\n\nThis is a senior technical role with significant design ownership. You’ll work directly with the founding engineers, contribute to architecture decisions, and see your designs go from schematic to silicon to customer products.\n\nResponsibilities\n\nDesign mmWave front‑end circuit blocks (PAs, LNAs, phase shifters, VGAs, mixers) in advanced CMOS or RFSOI (SiGe and III‑V processes are a plus).\n\nPerform transistor‑level schematic design, simulation, and optimization using Cadence Virtuoso (Spectre, ADE).\n\nConduct full‑custom IC layout or direct layout engineers, ensuring DRC/LVS‑clean designs at mmWave frequencies.\n\nPerform post‑layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to validate performance through parasitics.\n\nCollaborate on chip‑level architecture and system partitioning for multi‑channel beamformer ICs.\n\nSupport silicon bring‑up, bench characterization, and debugging of fabricated chips.\n\nContribute to tapeout preparation, design reviews, and documentation.\n\nMentor junior RFIC designers and contribute to a culture of technical excellence.\n\nRequired Qualifications\n\nMS + 5 years industry experience or PhD + 2 years industry experience in Electrical Engineering with a focus on RF/mmWave IC design.\n\nDemonstrated expertise in at least two of: PA, LNA, phase shifter, VGA, mixer, or frequency multiplier design at mmWave frequencies.\n\nExpert proficiency with Cadence EDA suite (Virtuoso, ADE, and Layout) and EM simulation tools (Ansys HFSS, EMX, or ADS Momentum).\n\nExperience with at least one full tapeout cycle: schematic to layout to fabrication to bring‑up to characterization.\n\nStrong understanding of mmWave transmission line theory, matching networks, and on‑chip passive design.\n\nTrack record of published work or shipped products demonstrating circuit design excellence.\n\nPreferred Qualifications\n\nExperience with phased array or multi‑channel beamformer IC design.\n\nBackground in SATCOM, 5G NR FR2, or automotive radar mmWave applications.\n\nExperience in SOI nodes with high resistivity substrates.\n\nFamiliar with system‑level RF specs: EVM, P1dB, noise figure, IP3, EIRP, and G/T.\n\nExperience in a startup or small‑team environment with high design ownership.\n\nStrong communication skills and ability to present design tradeoffs clearly.\n\nWhy Oso Semi?\n\nDesign ownership: You own blocks from concept to silicon.\n\nSmall team: Your voice matters in every architecture decision.\n\nCutting‑edge process: Advanced nodes for mmWave—the hardest corner of IC design.\n\nMeaningful equity: Competitive stock option grant. Early engineers capture real value.\n\nUC Berkeley DNA: Founded by PhDs published in IEEE conferences and journals.\n\nFirst Principles Innovation: Multiple patents providing 2-4x reductions in power.\n\nEstablished Traction: Signed multi‑year, high‑volume customer agreements in defense and commercial markets (SATCOM, radar, and 5G).\n\nWhat We Offer\n\nEquity: Stock option grant with 4‑year vesting and 1‑year cliff.\n\nMedical, Dental & Vision: Comprehensive health coverage with employer‑sponsored medical, dental, and vision plans.\n\nHybrid Schedule: Monday–Wednesday in office.\n\nTime Off: Unlimited PTO.\n\n401(k): Employer‑matched retirement plan.\n\nParental Leave: Equal parental leave for all parents.\n\nTeam Culture: Regular team lunches, events, and celebrations.\n\nLife Insurance: Company‑paid life insurance.\n\nFSA & HSA: Flexible spending and health savings account options available.\n\nCommuter Benefits: Pre‑tax transit and parking benefits.\n\nOso Semiconductor is an equal opportunity employer. We consider all qualified applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected characteristic.\n\n#J-18808-Ljbffr","datePosted":"2026-06-17T04:22:24.696Z","dateModified":"2026-06-17T04:22:24.696Z","hiringOrganization":{"@type":"Organization","name":"Mixmode","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mountain View","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"b8fca8affc9d1e4db53849c1"},"url":"https://jobsearcher.com/jobs/b8fca8affc9d1e4db53849c1"}}