{"schemaVersion":"jobsearcher.job.v1","id":"b7d3cd3796b965d1032cbf25","url":"https://jobsearcher.com/jobs/b7d3cd3796b965d1032cbf25","canonicalUrl":"https://jobsearcher.com/jobs/b7d3cd3796b965d1032cbf25","title":"ASIC Design & Verification Engineer | Remote","description":"ASIC/SoC Design & Verification EngineerWork SnapshotType: W-2 ContractCommitment: 20 40 hours per weekPay: $70 $100/hourWhat You'll Be DoingDesign and document realistic chip engineering problems drawn from hands-on experience, covering design, debugging, and verification work at a production level of rigor.Build complete reference solutions including RTL, testbenches, and supporting materials using SystemVerilog/Verilog and industry-standard toolchains.Evaluate model outputs against real engineering problems, identifying gaps in reasoning and providing structured technical feedback.Collaborate with a team of engineers to maintain consistent quality and difficulty standards across all submitted work.Apply deep domain knowledge across subsystem and SoC-level concerns including interface protocols, clock domain crossings, and multi-module dataflow.What We're Looking ForStrong experience in ASIC/SoC design and/or functional verification, ideally with exposure to production silicon through tapeout.Strong experience in SystemVerilog/Verilog with the ability to write clean, production-quality RTL and testbench code.Strong experience with industry verification toolchains such as Synopsys VCS, Cadence Xcelium, Siemens Questa, Verdi, or open-source equivalents including Icarus Verilog, Verilator, or CocoTB.Strong experience in at least one specialized domain: RTL design and microarchitecture, IP integration and bring-up, UVM-based functional verification, formal verification and coverage closure, PPA and synthesis optimization, or specification authoring.Strong experience working independently with clear written communication and the ability to document complex technical problems and solutions with precision.Application ProcessSubmit your application by completing the application form.Each application will be reviewed against the role requirements.Candidates who meet the requirements will receive an email with the next steps.Follow the instructions provided in the email to complete the remainder of the application process.","company":"Codegeniusrecruit","rawCompany":"codegeniusrecruit","isRemote":true,"isActive":false,"createdAt":"2026-07-11T11:36:46.744Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"}],"industries":[{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"541511","title":"Custom Computer Programming Services","slug":"custom-computer-programming-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"ASIC Design & Verification Engineer | Remote","description":"ASIC/SoC Design & Verification EngineerWork SnapshotType: W-2 ContractCommitment: 20 40 hours per weekPay: $70 $100/hourWhat You'll Be DoingDesign and document realistic chip engineering problems drawn from hands-on experience, covering design, debugging, and verification work at a production level of rigor.Build complete reference solutions including RTL, testbenches, and supporting materials using SystemVerilog/Verilog and industry-standard toolchains.Evaluate model outputs against real engineering problems, identifying gaps in reasoning and providing structured technical feedback.Collaborate with a team of engineers to maintain consistent quality and difficulty standards across all submitted work.Apply deep domain knowledge across subsystem and SoC-level concerns including interface protocols, clock domain crossings, and multi-module dataflow.What We're Looking ForStrong experience in ASIC/SoC design and/or functional verification, ideally with exposure to production silicon through tapeout.Strong experience in SystemVerilog/Verilog with the ability to write clean, production-quality RTL and testbench code.Strong experience with industry verification toolchains such as Synopsys VCS, Cadence Xcelium, Siemens Questa, Verdi, or open-source equivalents including Icarus Verilog, Verilator, or CocoTB.Strong experience in at least one specialized domain: RTL design and microarchitecture, IP integration and bring-up, UVM-based functional verification, formal verification and coverage closure, PPA and synthesis optimization, or specification authoring.Strong experience working independently with clear written communication and the ability to document complex technical problems and solutions with precision.Application ProcessSubmit your application by completing the application form.Each application will be reviewed against the role requirements.Candidates who meet the requirements will receive an email with the next steps.Follow the instructions provided in the email to complete the remainder of the application process.","datePosted":"2026-07-11T11:36:46.744Z","dateModified":"2026-07-11T11:36:46.744Z","hiringOrganization":{"@type":"Organization","name":"Codegeniusrecruit","sameAs":"https://jobsearcher.com"},"jobLocationType":"TELECOMMUTE","applicantLocationRequirements":{"@type":"Country","name":"US"},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"b7d3cd3796b965d1032cbf25"},"url":"https://jobsearcher.com/jobs/b7d3cd3796b965d1032cbf25"}}