{"schemaVersion":"jobsearcher.job.v1","id":"b6fade39d927d4dcf9f4b5d6","url":"https://jobsearcher.com/jobs/b6fade39d927d4dcf9f4b5d6","canonicalUrl":"https://jobsearcher.com/jobs/b6fade39d927d4dcf9f4b5d6","title":"Staff Engineer, RTL Memory Centric Computing","description":"Senior Engineer, RTL Memory Centric Computing Location: San Jose, California, United States\nPlease Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.\nAdvancing the World’s Technology Together\nOur technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.\nWe believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.\nThe AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team designs, prototypes, and optimizes next-generation AI systems through tight hardware–software co-design, collaborating with hardware and software engineers to address AI/ML workload challenges and explore computing abstractions that balance hardware and software components. We continuously conduct research across memory, computing, interconnect, and AI/ML to ensure our platforms handle demanding workloads, with a focus on affordability and sustainability. Join us in shaping the future of computing.\nWe are looking for a Senior Engineer, RTL Memory Centric Computing . This role is part of the AGICL lab within DSRA, a research-driven systems lab at the intersection of large language models, accelerator hardware, and high-performance software stacks.\nLocation : Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.\nWhat You’ll Do\nDevelop IP for memory centric computing systems using Verilog, System Verilog and HLS\nOptimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression\nCollaborate with Verification engineers to design and develop test plans\nMake design decisions out of a large design trade-off space across performance, power, thermal, and cost\nTroubleshoot and debug hardware issues and ensure the quality of the design through verification and validation\nStay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to development of new technologies\nCommunicate effectively with stakeholders, including users, partners, and management, to ensure systems are delivered on time and within budget\nComplete other responsibilities as assigned\nWhat You Bring\nBachelor’s with 5+ years, or Master’s with 3+ years, or PhD with 0+ years of industry experience\nStrong background in microarchitecture and computer architecture\n5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs\nExperience in designing Memory Controller, NOC, Interconnect IP\nExperience in Memory Centric computing IP and SOC integration\nExperience in AI/ML workloads\nStrong analytical and problem-solving skills\nExcellent communication and interpersonal skills\nAbility to work independently and as part of a team\nInclusive and adaptable to diverse global norms\nAvid learner who uses data to build understanding\nCollaborative, open to different approaches\nInnovative and creative, able to adapt quickly to change\nWhat We Offer\nThe pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on factors including function, location, experience, and education. We offer incentive opportunities and a diverse benefits package centered on employee wellbeing, including Medical/Dental/Vision/401k and additional support for employees and their families.\nEqual Opportunity Employment Policy\nSamsung Semiconductor is an equal opportunity employer. We value a diverse workforce and are committed to providing accommodations throughout recruiting processes for candidates with disabilities or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.\nWe do not accept unsolicited resumes. Only authorized recruitment agencies with a current agreement with Samsung Semiconductor, Inc. may submit resumes for job openings.\nApplicant Privacy Policy: https://semiconductor.samsung.com/about-us/careers/us/privacy/\n\n#J-18808-Ljbffr","company":"Conductor","rawCompany":"conductor","city":"San Jose","state":"CA","isRemote":false,"isActive":true,"createdAt":"2026-06-26T03:49:45.673Z","occupations":[{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"15-1221.00","title":"Computer and Information Research Scientists","slug":"computer-and-information-research-scientists"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Staff Engineer, RTL Memory Centric Computing","description":"Senior Engineer, RTL Memory Centric Computing Location: San Jose, California, United States\nPlease Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.\nAdvancing the World’s Technology Together\nOur technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.\nWe believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.\nThe AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team designs, prototypes, and optimizes next-generation AI systems through tight hardware–software co-design, collaborating with hardware and software engineers to address AI/ML workload challenges and explore computing abstractions that balance hardware and software components. We continuously conduct research across memory, computing, interconnect, and AI/ML to ensure our platforms handle demanding workloads, with a focus on affordability and sustainability. Join us in shaping the future of computing.\nWe are looking for a Senior Engineer, RTL Memory Centric Computing . This role is part of the AGICL lab within DSRA, a research-driven systems lab at the intersection of large language models, accelerator hardware, and high-performance software stacks.\nLocation : Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.\nWhat You’ll Do\nDevelop IP for memory centric computing systems using Verilog, System Verilog and HLS\nOptimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression\nCollaborate with Verification engineers to design and develop test plans\nMake design decisions out of a large design trade-off space across performance, power, thermal, and cost\nTroubleshoot and debug hardware issues and ensure the quality of the design through verification and validation\nStay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to development of new technologies\nCommunicate effectively with stakeholders, including users, partners, and management, to ensure systems are delivered on time and within budget\nComplete other responsibilities as assigned\nWhat You Bring\nBachelor’s with 5+ years, or Master’s with 3+ years, or PhD with 0+ years of industry experience\nStrong background in microarchitecture and computer architecture\n5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs\nExperience in designing Memory Controller, NOC, Interconnect IP\nExperience in Memory Centric computing IP and SOC integration\nExperience in AI/ML workloads\nStrong analytical and problem-solving skills\nExcellent communication and interpersonal skills\nAbility to work independently and as part of a team\nInclusive and adaptable to diverse global norms\nAvid learner who uses data to build understanding\nCollaborative, open to different approaches\nInnovative and creative, able to adapt quickly to change\nWhat We Offer\nThe pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on factors including function, location, experience, and education. We offer incentive opportunities and a diverse benefits package centered on employee wellbeing, including Medical/Dental/Vision/401k and additional support for employees and their families.\nEqual Opportunity Employment Policy\nSamsung Semiconductor is an equal opportunity employer. We value a diverse workforce and are committed to providing accommodations throughout recruiting processes for candidates with disabilities or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.\nWe do not accept unsolicited resumes. Only authorized recruitment agencies with a current agreement with Samsung Semiconductor, Inc. may submit resumes for job openings.\nApplicant Privacy Policy: https://semiconductor.samsung.com/about-us/careers/us/privacy/\n\n#J-18808-Ljbffr","datePosted":"2026-06-26T03:49:45.673Z","dateModified":"2026-06-26T03:49:45.673Z","hiringOrganization":{"@type":"Organization","name":"Conductor","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"b6fade39d927d4dcf9f4b5d6"},"url":"https://jobsearcher.com/jobs/b6fade39d927d4dcf9f4b5d6"}}