{"schemaVersion":"jobsearcher.job.v1","id":"b2bc549ce8092374cd2bcacb","url":"https://jobsearcher.com/jobs/b2bc549ce8092374cd2bcacb","canonicalUrl":"https://jobsearcher.com/jobs/b2bc549ce8092374cd2bcacb","title":"RTL Integration Engineer | SoC Debug & CDC Expert","description":"Broadcom Inc. in California seeks a senior RTL/SoC verification engineer to perform IP integration, test and debug at the SoC level, and create RTL designs with linting. The role includes CDC/RDC analysis for RTL and gate-level designs, plus synthesis, palladium modeling and STA support. Candidates should have expertise in UVM and SystemVerilog, GLS, zero-delay and SDF simulations, and strong debugging and communication skills. A Bachelor's degree with 12+ years experience is required.\n#J-18808-Ljbffr","company":"Broadcom","rawCompany":"broadcom","city":"San Jose","state":"CA","isRemote":false,"isActive":true,"createdAt":"2026-10-03T03:44:41.086Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"}],"industries":[{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"RTL Integration Engineer | SoC Debug & CDC Expert","description":"Broadcom Inc. in California seeks a senior RTL/SoC verification engineer to perform IP integration, test and debug at the SoC level, and create RTL designs with linting. The role includes CDC/RDC analysis for RTL and gate-level designs, plus synthesis, palladium modeling and STA support. Candidates should have expertise in UVM and SystemVerilog, GLS, zero-delay and SDF simulations, and strong debugging and communication skills. A Bachelor's degree with 12+ years experience is required.\n#J-18808-Ljbffr","datePosted":"2026-10-03T03:44:41.086Z","dateModified":"2026-10-03T03:44:41.086Z","hiringOrganization":{"@type":"Organization","name":"Broadcom","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"b2bc549ce8092374cd2bcacb"},"url":"https://jobsearcher.com/jobs/b2bc549ce8092374cd2bcacb"}}