{"schemaVersion":"jobsearcher.job.v1","id":"ab321ffa31e079e116d00b97","url":"https://jobsearcher.com/jobs/ab321ffa31e079e116d00b97","canonicalUrl":"https://jobsearcher.com/jobs/ab321ffa31e079e116d00b97","title":"Process Integration Engineer","description":"As our Photonics Process Integration Engineer, you will be an integral member of the OpenLight foundry and process team, with the key responsibility of the technical management of our heterogeneous Silicon-III-V photonic wafer process. You’ll work closely with external foundry partners, including silicon front end processing, heterogeneous wafer bonding, III‑V post‑bond wafer processing, and backend wafer processing (i.e., wafer bumping and singulation), to manage fabrication lots, implement associated control plans, and assure the process meets high volume manufacturing standards.\n\nIf you thrive in a fast‑paced development environment and enjoy working cross‑functionally with external foundry partners, internal device designers, photonic integrated circuit architects, layout engineers and program managers, this could be an excellent opportunity for you!\n\nResponsibilities\n\nEnd-to-end fabrication lot management, including creating detailed fabrication plans, participate in mask layout reviews for DfM, lead process reviews with all external foundries, and real‑time monitoring of fabrication lot progress to successful completion.\n\nSpearhead new process development initiatives centered around silicon/silicon nitride devices in close collaboration with internal teams and external foundry partners to facilitate the integration of advanced functionalities on the OpenLight heterogeneous Si Photonics platform.\n\nGather, evaluate, and synthesize in‑line process metrology data to generate statistical process variation charts (SPC), as well as electrical and optical process control monitor (PCM) results, contributing to the development of a yield improvement framework for the OpenLight heterogeneous silicon photonics platform.\n\nOversee wafer bonding initiatives on the OpenLight heterogeneous silicon photonics platform, identify yield‑limiting factors within the current workflow, and propose new design of experiments (DOE) to enhance yield.\n\nTrack process issues, work closely with external foundries to resolve issues in a timely manner, and drive process failure analysis with external failure analysis labs and with internal stakeholders. Collaborate closely with internal teams to identify device yield limiting factors and drive failure analysis.\n\nImplement control plans and process specifications to assure a manufacturable process and meets product requirements.\n\nAssist in the development of new process modules as required for OpenLight’s process design kit (PDK) and product roadmap.\n\nSkills and Preferred Experience\n\nPh. D. Degree in Electrical Engineering, Applied Material Science, Applied Physics or related discipline, or M. S. degree with 2-5 years of relevant professional experience\n\nIn-depth understanding and hands‑on experience of silicon photonic wafer process development and manufacturing including but not limited to photolithography, plasma etching techniques, planarization & metallization.\n\nIn-depth understanding and hands‑on experience of Si/SiN or III‑V process development and manufacturing. Strong preference for candidates with heterogeneous/hybrid Si‑III‑V experience.\n\nExperience with semiconductor metrology techniques – ellipsometry, profilometry, SEM, TEM, AFM.\n\nExpertise in IC wafer processing failure analysis techniques\n\nSolid understanding of statistical processes and analysis\n\nHands‑on experience with optical or electronic PCM and device data analysis\n\nStrong technical leadership and an ability to think independently\n\nVery strong problem solving, communication, organizational, interpersonal, and presentation skills.\n\n#J-18808-Ljbffr","company":"Open Light","rawCompany":"open light","city":"California","state":"MO","isRemote":false,"isActive":false,"createdAt":"2026-06-21T03:41:46.116Z","occupations":[{"code":"17-2199.07","title":"Photonics Engineers","slug":"photonics-engineers"},{"code":"51-9141.00","title":"Semiconductor Processing Technicians","slug":"semiconductor-processing-technicians"},{"code":"17-2131.00","title":"Materials Engineers","slug":"materials-engineers"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"541715","title":"Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)","slug":"research-and-development-in-the-physical-engineering-and-life-sciences-except-nanotechnology-and-biotechnology"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Process Integration Engineer","description":"As our Photonics Process Integration Engineer, you will be an integral member of the OpenLight foundry and process team, with the key responsibility of the technical management of our heterogeneous Silicon-III-V photonic wafer process. You’ll work closely with external foundry partners, including silicon front end processing, heterogeneous wafer bonding, III‑V post‑bond wafer processing, and backend wafer processing (i.e., wafer bumping and singulation), to manage fabrication lots, implement associated control plans, and assure the process meets high volume manufacturing standards.\n\nIf you thrive in a fast‑paced development environment and enjoy working cross‑functionally with external foundry partners, internal device designers, photonic integrated circuit architects, layout engineers and program managers, this could be an excellent opportunity for you!\n\nResponsibilities\n\nEnd-to-end fabrication lot management, including creating detailed fabrication plans, participate in mask layout reviews for DfM, lead process reviews with all external foundries, and real‑time monitoring of fabrication lot progress to successful completion.\n\nSpearhead new process development initiatives centered around silicon/silicon nitride devices in close collaboration with internal teams and external foundry partners to facilitate the integration of advanced functionalities on the OpenLight heterogeneous Si Photonics platform.\n\nGather, evaluate, and synthesize in‑line process metrology data to generate statistical process variation charts (SPC), as well as electrical and optical process control monitor (PCM) results, contributing to the development of a yield improvement framework for the OpenLight heterogeneous silicon photonics platform.\n\nOversee wafer bonding initiatives on the OpenLight heterogeneous silicon photonics platform, identify yield‑limiting factors within the current workflow, and propose new design of experiments (DOE) to enhance yield.\n\nTrack process issues, work closely with external foundries to resolve issues in a timely manner, and drive process failure analysis with external failure analysis labs and with internal stakeholders. Collaborate closely with internal teams to identify device yield limiting factors and drive failure analysis.\n\nImplement control plans and process specifications to assure a manufacturable process and meets product requirements.\n\nAssist in the development of new process modules as required for OpenLight’s process design kit (PDK) and product roadmap.\n\nSkills and Preferred Experience\n\nPh. D. Degree in Electrical Engineering, Applied Material Science, Applied Physics or related discipline, or M. S. degree with 2-5 years of relevant professional experience\n\nIn-depth understanding and hands‑on experience of silicon photonic wafer process development and manufacturing including but not limited to photolithography, plasma etching techniques, planarization & metallization.\n\nIn-depth understanding and hands‑on experience of Si/SiN or III‑V process development and manufacturing. Strong preference for candidates with heterogeneous/hybrid Si‑III‑V experience.\n\nExperience with semiconductor metrology techniques – ellipsometry, profilometry, SEM, TEM, AFM.\n\nExpertise in IC wafer processing failure analysis techniques\n\nSolid understanding of statistical processes and analysis\n\nHands‑on experience with optical or electronic PCM and device data analysis\n\nStrong technical leadership and an ability to think independently\n\nVery strong problem solving, communication, organizational, interpersonal, and presentation skills.\n\n#J-18808-Ljbffr","datePosted":"2026-06-21T03:41:46.116Z","dateModified":"2026-06-21T03:41:46.116Z","hiringOrganization":{"@type":"Organization","name":"Open Light","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"California","addressRegion":"MO","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"ab321ffa31e079e116d00b97"},"url":"https://jobsearcher.com/jobs/ab321ffa31e079e116d00b97"}}