{"schemaVersion":"jobsearcher.job.v1","id":"a8272ddcee441c9b173eb8ae","url":"https://jobsearcher.com/jobs/a8272ddcee441c9b173eb8ae","canonicalUrl":"https://jobsearcher.com/jobs/a8272ddcee441c9b173eb8ae","title":"Power Integrity Engineer, Platforms Engineering","description":"Minimum qualifications:\nBachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.\n\n2 years of experience working in a system-level power delivery network design, analysis, and validation technical environment, or 1 year of experience with an advanced degree.\n\nExperience with power management methodologies, power delivery, and signal integrity interactions of common I/O interfaces.\n\nExperience with PCB, package and silicon technologies, and their impact on power delivery solutions.\n\nPreferred qualifications:\nMaster's or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.\n\nExperience in power integrity fundamentals, including board power conversion design for motherboard, data center hardware products, and power integrity conversion design.\n\nExperience with lab measurement, validation and correlation at package, Die, and PCB level.\n\nExperience with Electronic design automation tools.\n\nKnowledge of system power delivery networks and switching voltage regulator modeling and simulation.\n\nKnowledge of 3D/2D electromagnetic simulation tools, lab equipment, and scripting languages.\n\nAbout the job\nAs a Hardware Engineer, you design and build the systems that are the heart of the computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into data centers affecting users.\n\nWith your technical expertise, you will lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation, troubleshooting, and debugging with vendors.\n\nAs a Power Integrity Engineer, you will play a key role in the development of computing infrastructures. You will work as part of a team to deliver innovative power solutions for point of load application. You will design, analyze, optimize, and implement board, substrate package, and chip level power delivery topologies for point of load application including Application-Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), and processors.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.\n\nThe US base salary range for this full-time position is $122,000-$178,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.\n\nPlease note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.\n\nResponsibilities\nInnovate and design on board, on substrate and on chip level Power Delivery Networks (PDN). Analyze performance, cost, reliability and availability design trade-offs.\n\nProvide technical leadership and direction while troubleshooting complex system level power delivery issues.\n\nWork cross-functionally with Project teams, on system bring up and design validation.\n\nPerform lab design validation, correlation study, and root cause debugging.\n\nGoogle is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.","company":"Google","rawCompany":"google","city":"Sunnyvale","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-04-12T20:44:52.219Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2071.00","title":"Electrical Engineers","slug":"electrical-engineers"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"541715","title":"Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)","slug":"research-and-development-in-the-physical-engineering-and-life-sciences-except-nanotechnology-and-biotechnology"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Power Integrity Engineer, Platforms Engineering","description":"Minimum qualifications:\nBachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.\n\n2 years of experience working in a system-level power delivery network design, analysis, and validation technical environment, or 1 year of experience with an advanced degree.\n\nExperience with power management methodologies, power delivery, and signal integrity interactions of common I/O interfaces.\n\nExperience with PCB, package and silicon technologies, and their impact on power delivery solutions.\n\nPreferred qualifications:\nMaster's or PhD degree in Electrical Engineering, Computer Engineering, Physics, or a related field.\n\nExperience in power integrity fundamentals, including board power conversion design for motherboard, data center hardware products, and power integrity conversion design.\n\nExperience with lab measurement, validation and correlation at package, Die, and PCB level.\n\nExperience with Electronic design automation tools.\n\nKnowledge of system power delivery networks and switching voltage regulator modeling and simulation.\n\nKnowledge of 3D/2D electromagnetic simulation tools, lab equipment, and scripting languages.\n\nAbout the job\nAs a Hardware Engineer, you design and build the systems that are the heart of the computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into data centers affecting users.\n\nWith your technical expertise, you will lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation, troubleshooting, and debugging with vendors.\n\nAs a Power Integrity Engineer, you will play a key role in the development of computing infrastructures. You will work as part of a team to deliver innovative power solutions for point of load application. You will design, analyze, optimize, and implement board, substrate package, and chip level power delivery topologies for point of load application including Application-Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), and processors.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.\n\nThe US base salary range for this full-time position is $122,000-$178,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.\n\nPlease note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.\n\nResponsibilities\nInnovate and design on board, on substrate and on chip level Power Delivery Networks (PDN). Analyze performance, cost, reliability and availability design trade-offs.\n\nProvide technical leadership and direction while troubleshooting complex system level power delivery issues.\n\nWork cross-functionally with Project teams, on system bring up and design validation.\n\nPerform lab design validation, correlation study, and root cause debugging.\n\nGoogle is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.","datePosted":"2026-04-12T20:44:52.219Z","dateModified":"2026-04-12T20:44:52.219Z","hiringOrganization":{"@type":"Organization","name":"Google","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"a8272ddcee441c9b173eb8ae"},"url":"https://jobsearcher.com/jobs/a8272ddcee441c9b173eb8ae"}}