{"schemaVersion":"jobsearcher.job.v1","id":"a438fba48bda8f1e499e1287","url":"https://jobsearcher.com/jobs/a438fba48bda8f1e499e1287","canonicalUrl":"https://jobsearcher.com/jobs/a438fba48bda8f1e499e1287","title":"Senior Memory Controller Verification Engineer Equity","description":"NVIDIA in Seattle is seeking a Senior Verification Engineer to join the GPU Memory Subsystem IP verification team. You will partner with design and architecture to validate implementations, craft verification plans, and sign off on functional correctness and performance.\nYou will develop testbenches, BFMs, monitors, and randoms; drive test plan execution for planned features; ensure RTL coverage; and collaborate with FPGA and software teams to test software.\n\n#J-18808-Ljbffr","company":"NVIDIA","rawCompany":"nvidia","city":"Seattle","state":"WA","isRemote":false,"isActive":false,"createdAt":"2026-07-16T03:33:29.036Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"15-1253.00","title":"Software Quality Assurance Analysts and Testers","slug":"software-quality-assurance-analysts-and-testers"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Senior Memory Controller Verification Engineer Equity","description":"NVIDIA in Seattle is seeking a Senior Verification Engineer to join the GPU Memory Subsystem IP verification team. You will partner with design and architecture to validate implementations, craft verification plans, and sign off on functional correctness and performance.\nYou will develop testbenches, BFMs, monitors, and randoms; drive test plan execution for planned features; ensure RTL coverage; and collaborate with FPGA and software teams to test software.\n\n#J-18808-Ljbffr","datePosted":"2026-07-16T03:33:29.036Z","dateModified":"2026-07-16T03:33:29.036Z","hiringOrganization":{"@type":"Organization","name":"NVIDIA","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Seattle","addressRegion":"WA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"a438fba48bda8f1e499e1287"},"url":"https://jobsearcher.com/jobs/a438fba48bda8f1e499e1287"}}