{"schemaVersion":"jobsearcher.job.v1","id":"a2b0ecccacd6dec34ab3f3b8","url":"https://jobsearcher.com/jobs/a2b0ecccacd6dec34ab3f3b8","canonicalUrl":"https://jobsearcher.com/jobs/a2b0ecccacd6dec34ab3f3b8","title":"Graphics FE Implementation Engineer","description":"Summary\n\nPosted: Aug 11, 2023\n\nRole Number:200496182\n\nDo you love creating elegant solutions to highly complex challenges? As part of our Silicon Engineering group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processors! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. As part of the GPU FE Implementation team, you’ll be responsible for crafting and building a GPU that enriches the lives of millions of people every day!\n\nDescription\n\nThe successful candidate will work closely with the RTL and PD (physical design) teams and be responsible for synthesis, analysis, and optimization of the delivered IP. For this role, use and develop advanced techniques to meet challenging timing, power and area targets while also working with our partners in STA and DFT to achieve successful first silicon. Through this collaboration, you will deliver the best-in-class GPU’s for the best consumer products. If you’re ready to help chart the future of Apple Silicon, we’d love to talk to you.\n\nKey Qualifications\n\nWe seek highly motivated individuals with expert synthesis design experience that understand RTL design principles and can drive quality physical design implementation.\nOwn block level synthesis and drive analysis and optimizations using advanced synthesis techniques and RTL design improvement for optimal Area, Timing Power.\nCollaborate with Physical Design and Timing Analysis teams on physical concepts like floor-planning, placement, congestion, and timing constraints.\nAnalyze architectural critical paths and drive multi-block closure across RTL Design and Physical Design teams.\nDebug complex logic equivalence issues and reviewing netlist checks to validate functionality and netlist quality.\nDemonstrated ability to solve complex problems across multiple technical domains.\nDevelop and Drive adoption of innovative methodologies across projects and teams\nExperience implementing ECOs for functionality and timing.\nExperience with one or more of: reset domain, multi-clock domain, multi-power domain (UPF), linting tools across RTL and Gate-Level.\nRelevant scripting experience in ASIC flows - python, tcl, Perl, Data manipulation.\nPreferred, but not required:\nFamiliarity with DFT insertion.\nFamiliarity with simulation, debugging tools and experience of working closely with design verification team.\nExperience working on GPUs is desirable.\n\nEducation & Experience\n\nWe are looking for candidates with BS + 10 years of relevant experience.\n\nAdditional Requirements\n\nMore\n\nApple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.","company":"Apple","rawCompany":"apple","city":"Orlando","state":"FL","isRemote":false,"isActive":false,"createdAt":"2026-04-12T20:37:22.834Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"513210","title":"Software Publishers","slug":"software-publishers"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Graphics FE Implementation Engineer","description":"Summary\n\nPosted: Aug 11, 2023\n\nRole Number:200496182\n\nDo you love creating elegant solutions to highly complex challenges? As part of our Silicon Engineering group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processors! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. As part of the GPU FE Implementation team, you’ll be responsible for crafting and building a GPU that enriches the lives of millions of people every day!\n\nDescription\n\nThe successful candidate will work closely with the RTL and PD (physical design) teams and be responsible for synthesis, analysis, and optimization of the delivered IP. For this role, use and develop advanced techniques to meet challenging timing, power and area targets while also working with our partners in STA and DFT to achieve successful first silicon. Through this collaboration, you will deliver the best-in-class GPU’s for the best consumer products. If you’re ready to help chart the future of Apple Silicon, we’d love to talk to you.\n\nKey Qualifications\n\nWe seek highly motivated individuals with expert synthesis design experience that understand RTL design principles and can drive quality physical design implementation.\nOwn block level synthesis and drive analysis and optimizations using advanced synthesis techniques and RTL design improvement for optimal Area, Timing Power.\nCollaborate with Physical Design and Timing Analysis teams on physical concepts like floor-planning, placement, congestion, and timing constraints.\nAnalyze architectural critical paths and drive multi-block closure across RTL Design and Physical Design teams.\nDebug complex logic equivalence issues and reviewing netlist checks to validate functionality and netlist quality.\nDemonstrated ability to solve complex problems across multiple technical domains.\nDevelop and Drive adoption of innovative methodologies across projects and teams\nExperience implementing ECOs for functionality and timing.\nExperience with one or more of: reset domain, multi-clock domain, multi-power domain (UPF), linting tools across RTL and Gate-Level.\nRelevant scripting experience in ASIC flows - python, tcl, Perl, Data manipulation.\nPreferred, but not required:\nFamiliarity with DFT insertion.\nFamiliarity with simulation, debugging tools and experience of working closely with design verification team.\nExperience working on GPUs is desirable.\n\nEducation & Experience\n\nWe are looking for candidates with BS + 10 years of relevant experience.\n\nAdditional Requirements\n\nMore\n\nApple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.","datePosted":"2026-04-12T20:37:22.834Z","dateModified":"2026-04-12T20:37:22.834Z","hiringOrganization":{"@type":"Organization","name":"Apple","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Orlando","addressRegion":"FL","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"a2b0ecccacd6dec34ab3f3b8"},"url":"https://jobsearcher.com/jobs/a2b0ecccacd6dec34ab3f3b8"}}