{"schemaVersion":"jobsearcher.job.v1","id":"a2657b4bb9cc6242be100c87","url":"https://jobsearcher.com/jobs/a2657b4bb9cc6242be100c87","canonicalUrl":"https://jobsearcher.com/jobs/a2657b4bb9cc6242be100c87","title":"Field-Programmable Gate Arrays Engineer","description":"RTL Design & FPGA Engineer for an opportunity in San Jose, CA - OnsiteThe ideal candidate should have proven expertise in Verilog-based synthesizable RTLdevelopment, register map implementation, and modular RTL design. Strong experience withStrong experience with FPGA clocking structures and deterministic reset schemes is required.Required experience includes:Proven Verilog expertise in synthesizable RTL, register map implementation, and modular design.Strong understanding of FPGA clocking structures and deterministic reset schemes.Experience with at least one of the following FPGA toolchains:Microchip LiberoAMD/Xilinx VivadoHands-on experience writing SDC/XDC timing constraints, including clock definitions, I/O delays, and timing exceptions.Experience with FPGA I/O pin planning and device bank rules.Experience developing Makefile and/or Tcl-based build automation.Experience with Verilog and/or SystemVerilog simulation using tools such as VCS, Questa/ModelSim, or Vivado Simulator.Experience with embedded FPGA debug tools such as ILA, SignalTap, or ChipScope.Hands-on experience with lab board bring-up, PLD programming, and hardware debugging.Working experience with some standard protocols, such as AXI4/AXI-Lite, AHB-Lite, APB, PCIe, I2C, SPI, MDIO, or UART. Experience with all listed protocols is not required.Experience with Quartus or Lattice toolchains would be a plus.","company":"Programmingcom","rawCompany":"programmingcom","city":"San Jose","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-09-18T09:16:56.456Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Field-Programmable Gate Arrays Engineer","description":"RTL Design & FPGA Engineer for an opportunity in San Jose, CA - OnsiteThe ideal candidate should have proven expertise in Verilog-based synthesizable RTLdevelopment, register map implementation, and modular RTL design. Strong experience withStrong experience with FPGA clocking structures and deterministic reset schemes is required.Required experience includes:Proven Verilog expertise in synthesizable RTL, register map implementation, and modular design.Strong understanding of FPGA clocking structures and deterministic reset schemes.Experience with at least one of the following FPGA toolchains:Microchip LiberoAMD/Xilinx VivadoHands-on experience writing SDC/XDC timing constraints, including clock definitions, I/O delays, and timing exceptions.Experience with FPGA I/O pin planning and device bank rules.Experience developing Makefile and/or Tcl-based build automation.Experience with Verilog and/or SystemVerilog simulation using tools such as VCS, Questa/ModelSim, or Vivado Simulator.Experience with embedded FPGA debug tools such as ILA, SignalTap, or ChipScope.Hands-on experience with lab board bring-up, PLD programming, and hardware debugging.Working experience with some standard protocols, such as AXI4/AXI-Lite, AHB-Lite, APB, PCIe, I2C, SPI, MDIO, or UART. Experience with all listed protocols is not required.Experience with Quartus or Lattice toolchains would be a plus.","datePosted":"2026-09-18T09:16:56.456Z","dateModified":"2026-09-18T09:16:56.456Z","hiringOrganization":{"@type":"Organization","name":"Programmingcom","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"a2657b4bb9cc6242be100c87"},"url":"https://jobsearcher.com/jobs/a2657b4bb9cc6242be100c87"}}